Origin of common‐mode noise in two‐dimensional finite‐size circuit and reduction of the noise using a symmetric three‐line circuit

Abstract

Summary In this paper, we investigate common‐mode (CM) noise caused by a connection to a two‐dimensional finite‐size ground plane. Numerical calculations are conducted to visualize the time variation of potentials that leads to CM noise. A connection of the signal line to the ground plane, which is conventionally used in circuits, causes an imbalance in the circuit that makes the potential of the ground plane fluctuate, which results in CM noise. CM noise does not occur in a symmetric three‐line circuit because the potential of the middle line is always kept at 0 V. Furthermore, the middle line prevents an externally induced potential fluctuation of the ground plane from being converted to a normal‐mode voltage (i.e., CM noise).