Organic Floating Gate Memory Structures

Fakher, S J; Sleiman, Adam; Ayesh, Ahmad I.; Ghaferi, Amal Al; Petty, Michael C.; Zeze, Dagou A.; Mabrook, M.F.

doi:10.1007/978-3-319-48705-2_4

Cited by 1 publication

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“…In order to estimate the effect of the GO as the charge trapping layer, we determined the amount of charge stored ( Q ) in the GO floating gate using the equation [19,20,21,22] Q=Ci ΔVT where C i is the insulator capacitance per unit area and V T is the threshold voltage. C i was measured for TIPS-pentacene/cPMMA structure and estimated to be ~6.8 × 10 −9 F·cm −2 .…”

Section: Resultsmentioning

confidence: 99%

Improved Memory Properties of Graphene Oxide-Based Organic Memory Transistors

et al. 2019

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To investigate the behaviour of the organic memory transistors, graphene oxide (GO) was utilized as the floating gate in 6,13-Bis(triisopropylsilylethynyl)pentacene (TIPS-pentacene)-based organic memory transistors. A cross-linked, off-centre spin-coated and ozone-treated poly(methyl methacrylate) (cPMMA) was used as the insulating layer. High mobility and negligible hysteresis with very clear transistor behaviour were observed for the control transistors. On the other hand, memory transistors exhibited clear large hysteresis which is increased with increasing programming voltage. The shifts in the threshold voltage of the transfer characteristics as well as the hysteresis in the output characteristics were attributed to the charging and discharging of the floating gate. The counter-clockwise direction of hysteresis indicates that the process of charging and discharging the floating gate take place through the semiconductor/insulator interface. A clear shift in the threshold voltage was observed when different voltage pulses were applied to the gate. The non-volatile behaviour of the memory transistors was investigated in terms of charge retention. The memory transistors exhibited a large memory window (~30 V), and high charge density of (9.15 × 1011 cm−2).

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