Organic field-effect transistor nonvolatile memories utilizing sputtered C nanoparticles as nano-floating-gate

Abstract

Articles you may be interested inAmbipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory Appl. Phys. Lett.

Direct probing of electron and hole trapping into nano-floating-gate in organic field-effect transistor nonvolatile memories

“…The quantity of charge trapping is often indirectly derived from the threshold voltage (V T ) shift (DV T ) in device transfer characteristics, with positive and negative DV T corresponding to electron and hole trapping, respectively. [4][5][6] Hence, it is highly needed to develop a direct and simple approach to probe charge trapping into the nano-floating-gate, which may offer insights for understanding the charge trapping mechanism and improving the memory performance.…”

“…[1][2][3] Among others, utilization of nano-floating-gate in OFET memories is superior because charge trapping into the nano-sized floatinggate, which is of key importance for memory performance, could be well controlled by varying density, size, and/or composition of the charge trapping nanostructures. [4][5][6] Furthermore, the spatial discreteness of charge trapping sites is beneficial for scaling down of tunneling dielectric and improvement of retention capability. 7,8 In a nano-floating-gate OFET memory, electron and hole trapping into the nano-floating-gate is the mechanism to open a memory window.…”

Charge storage and tunneling mechanism of Ni nanocrystals embedded HfOx film

“…4(b). When the endurance measurement reaches to 1×10 5 was applied one pulse of ±6 V (electron and hole charging) with a width of 10 s. As shown in fig. 5(a), the loss of electron charge is less than 2 % , and the loss of hole charge is less than 5 % after waiting for 10 5 s. After programming the memory cell in the write or erase state, the flat-band voltage shift (V FB ) was monitored for at least 30 h. As shown in fig.…”

Bias‐Stress‐Stable Low‐Voltage Organic Field‐Effect Transistors with Ultrathin Polymer Dielectric on C Nanoparticles

“…The X-ray photoelectron spectroscopy (XPS) and Raman characterization results ( Figure S1, Supporting Information) suggest that the sputtered C NPs are amorphous C containing oxygenated groups and small graphite-like domains. [ 23 ] The C-NP-modifi ed Si surface possesses high surface energy and induces a small water contact angle of 45° (Figure 1 ), and the surface roughness is slightly increased from 0.17 ± 0.03 to 0.24 ± 0.03 nm upon the deposition of C NPs. Three kinds of low-k polymers, i.e., polystyrene (PS), polymethylmethacrylate (PMMA), and poly(2-vinyl naphthalene) (PVN), are then spin-coated onto the sputtered C NPs as the gate dielectrics (PS/C, PMMA/C, and PVN/C, respectively).…”

“…[ 23 ] The atomic force microscopy (AFM) image in Figure 1 demonstrates the uniform distribution of a number of C NPs on the substrate, and their height and lateral size are around 2 and 20 nm, respectively. The X-ray photoelectron spectroscopy (XPS) and Raman characterization results ( Figure S1, Supporting Information) suggest that the sputtered C NPs are amorphous C containing oxygenated groups and small graphite-like domains.…”