Optimizing many-field packet classification on FPGA, multi-core general purpose processor, and GPU

Qu, Yun R.; Zhang, Hao Helen; Zhou, Shijie; Prasanna, Viktor K.

doi:10.1109/ancs.2015.7110123

Cited by 30 publications

(14 citation statements)

References 14 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In 2015, Qu et al implemented the bit-vector algorithm, which is a decomposition-based algorithm, in a parallel manner on a multicore processor [42]. Decomposition-based algorithms have two phases of search and combination of results.…”

Section: Related Workmentioning

confidence: 99%

Investigating the efficiency of multithreading application programming interfaces for parallel packet classification in wireless sensor networks

Abbasi¹,

Rafiee²,

Khosravi³

2020

Turk J Elec Eng & Comp Sci

View full text Add to dashboard Cite

This paper investigates the most appropriate application programming interface (API) that best accelerates the flow-based applications on the wireless sensor networks (WSNs). Each WSN include many sensor nodes which have limited resources. These sensor nodes are connected together using base stations. The base stations are commonly network systems with conventional processors which are responsible for handling a large amount of communicated data in flows of network packets. For this purpose, classification of the communicated packets is considered the primary process in such systems. With the advent of high-performance multicore processors, developers in the network industry have considered these processors as a striking choice for implementing a wide range of flow-based wireless sensor networking applications. The main challenge in this field is choosing and exploiting an API which best allows multithreading; i.e. one which maximally hides the latency of performing complex operations by threads and increases the overall efficiency of the cores. This paper assesses the efficiency of Thread, Open Multiprocessing, and Threading Building Blocks (TBB) libraries in multithread implementation of set-pruning and grid-of-tries packet classification algorithms on dual-core and quad-core processors. In all cases, the speed and throughput of all parallel versions of the classification algorithms are much more than the corresponding serial versions. Moreover, for parallel classification of a sufficiently large number of packets by both classification algorithms, TBB library results in higher throughput and performance than the other libraries due to its automatic scheduling and internal task stealing mechanism.

show abstract

Section: Related Workmentioning

confidence: 99%

Investigating the efficiency of multithreading application programming interfaces for parallel packet classification in wireless sensor networks

Abbasi¹,

Rafiee²,

Khosravi³

2020

Turk J Elec Eng & Comp Sci

View full text Add to dashboard Cite

show abstract

“…In 2015, Qu et al [31] implemented the bit‐vector algorithm, which is a decomposition‐based algorithm, in a parallel manner on a multi‐core processor. Decomposition‐based algorithms have two phases of search and a combination of results.…”

Section: Related Workmentioning

confidence: 99%

Efficient parallelisation of the packet classification algorithms on multi‐core central processing units using multi‐threading application program interfaces

Abbasi

Rafiee

2020

IET Computers & Digital Techniques

View full text Add to dashboard Cite

“…In their proposed model for kernel, each thread is responsible for classifying a certain number of packets. Qu et al experiment with Bit-Vector algorithm on a hybrid GPU-CPU system (Qu et al 2015). In their proposed kernel, on the coming of a new packet, five GPU threads are exploited, each of which classifies the packet based on the value of each field and creates a bit vector.…”

Section: Related Workmentioning

confidence: 99%

Peer Review #1 of "Enhancing the performance of the aggregated bit vector algorithm in network packet classification using GPU (v0.1)"

2019

View full text Add to dashboard Cite

Packet classification is a computationally intensive, highly parallelizable task in many advanced network systems like high-speed routers and firewalls that enable different functionalities through discriminating incoming traffic. Recently, graphics processing units (GPUs) have been exploited as efficient accelerators for parallel implementation of software classifiers. The Aggregated bit vector (ABV) is a highly parallelizable packet classification algorithm. In this work, first we present a parallel kernel for running this algorithm on GPUs. Next we adapt an asymptotic analysis method which predicts any empirical result of the proposed kernel. Experimental results not only confirm the efficiency of the proposed parallel kernel but also reveal the accuracy of the analysis method in predicting important trends in experimental results.

show abstract

Optimizing many-field packet classification on FPGA, multi-core general purpose processor, and GPU

Cited by 30 publications

References 14 publications

Investigating the efficiency of multithreading application programming interfaces for parallel packet classification in wireless sensor networks

Investigating the efficiency of multithreading application programming interfaces for parallel packet classification in wireless sensor networks

Efficient parallelisation of the packet classification algorithms on multi‐core central processing units using multi‐threading application program interfaces

Peer Review #1 of "Enhancing the performance of the aggregated bit vector algorithm in network packet classification using GPU (v0.1)"

Contact Info

Product

Resources

About