Optimizing Ansatz Design in QAOA for Max-cut

Majumdar, Ritajit; Madan, Dhiraj; Bhoumik, Debasmita; Vinayagamurthy, Dhinakaran; Raghunathan, Shesha; Sur-Kolay, Susmita

doi:10.48550/arxiv.2106.02812

Cited by 10 publications

(35 citation statements)

References 14 publications

(23 reference statements)

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“…where η is the number of non-zero h i in Eq. (1) and N 0 ≤ ⌊n/2⌋ is an instance-dependent number of CNOT gates that can be removed from the first layer of the circuit as they do not affect the initial state [55], see Supplemental Information Sec. I for details.…”

Section: Mapping To Hardwarementioning

confidence: 99%

“…Note there is an optimal ordering of edge terms (Z i Z j ) to maximize the number of CNOT gates that can be canceled in this way-for example, consecutive disjoint edge terms, such as Z 0 Z 1 and Z 2 Z 3 , result in more gate cancellation opportunities than a chaining list of terms, such as Z 0 Z 1 and Z 1 Z 2 . The procedure allows us to cancel at most ⌊n/2⌋ gates, as noted Majumdar et al [55], since we can have at most ⌊n/2⌋ sets of Z i Z j gates with disjoint sets of operands i, j.…”

Section: Table I: Sabre Parametersmentioning

confidence: 99%

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Scaling Quantum Approximate Optimization on Near-term Hardware

Lotshaw,

Nguyen,

Santana

et al. 2022

Preprint

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The quantum approximate optimization algorithm (QAOA) is an approach for near-term quantum computers to potentially demonstrate computational advantage in solving combinatorial optimization problems. However, the viability of the QAOA depends on how its performance and resource requirements scale with problem size and complexity for realistic hardware implementations. Here, we quantify scaling of the expected resource requirements by synthesizing optimized circuits for hardware architectures with varying levels of connectivity. Assuming noisy gate operations, we estimate the number of measurements needed to sample the output of the idealized QAOA circuit with high probability. We show the number of measurements, and hence total time to solution, grows exponentially in problem size and problem graph degree as well as depth of the QAOA ansatz, gate infidelities, and inverse hardware graph degree. These problems may be alleviated by increasing hardware connectivity or by recently proposed modifications to the QAOA that achieve higher performance with fewer circuit layers.

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Section: Mapping To Hardwarementioning

confidence: 99%

Section: Table I: Sabre Parametersmentioning

confidence: 99%

Scaling Quantum Approximate Optimization on Near-term Hardware

Lotshaw,

Nguyen,

Santana

et al. 2022

Preprint

View full text Add to dashboard Cite

show abstract

“…In the rest of the paper, Sec. 2 gives a brief review of QAOA for Max-Cut and the DFS based optimization proposed in [9]. In Sec.…”

Section: Contributions Of This Articlementioning

confidence: 99%

“…They also argued that the expectation value of the cut produced by the algorithm is a non-decreasing function of p. Therefore, QAOA is expected to be a potential candidate for quantum advantage using near-term devices. Many researchers, since then, have studied QAOA in the context of the Max-Cut problem [4][5][6][7][8][9].…”

Section: Introductionmentioning

confidence: 99%

“…In [9], Majumdar et al proposed a Depth First Search (DFS) based method that can eliminate n − 1 CNOT gates in the circuit of QAOA Max-Cut for any graph G = (V, E), where |V | = n. Since CNOT gates are one of the primary sources of error in modern quantum devices [15], this procedure significantly reduces the noise in the circuit. As this method imposes an ordering of the edges (discussed in detail in Sec.…”

Section: Introductionmentioning

confidence: 99%

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Depth Optimized Ansatz Circuit in QAOA for Max-Cut

Majumdar¹,

Bhoumik²,

Madan³

et al. 2021

Preprint

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While a Quantum Approximate Optimization Algorithm (QAOA) is intended to provide a quantum advantage in finding approximate solutions to combinatorial optimization problems, noise in the system is a hurdle in exploiting its full potential. Several error mitigation techniques have been studied to lessen the effect of noise on this algorithm. Recently, Majumdar et al. proposed a Depth First Search (DFS) based method to reduce n − 1 CNOT gates in the ansatz design of QAOA for finding Max-Cut in a graph G = (V, E), |V | = n. However, this method tends to increase the depth of the circuit, making it more prone to relaxation error. The depth of the circuit is proportional to the height of the DFS tree, which can be n − 1 in the worst case. In this paper, we propose an O(∆ • n 2 ) greedy heuristic algorithm, where ∆ is the maximum degree of the graph, that finds a spanning tree of lower height, thus reducing the overall depth of the circuit while still retaining the n − 1 reduction in the number of CNOT gates needed in the ansatz. We numerically show that this algorithm achieves 10 times increase in the probability of success for each iteration of QAOA for Max-Cut. We further show that although the average depth of the circuit produced by this heuristic algorithm still grows linearly with n, our algorithm reduces the slope of the linear increase from 1 to 0.11.

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A practitioner’s guide to quantum algorithms for optimisation problems

Symons,

Galvin,

Sahin

et al. 2023

J. Phys. A: Math. Theor.

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Quantum computing is gaining popularity across a wide range of scientific disciplines due to its potential to solve long-standing computational problems that are considered intractable with classical computers. One promising area where quantum computing has potential is in the speed-up of NP-hard optimisation problems that are common in industrial areas such as logistics and finance. Newcomers to the field of quantum computing who are interested in using this technology to solve optimisation problems do not have an easily accessible source of information on the current capabilities of quantum computers and algorithms. This paper aims to provide a comprehensive overview of the theory of quantum optimisation techniques and their practical application, focusing on their near-term potential for NISQ devices.The paper starts by drawing parallels between classical and quantum optimisation problems, highlighting their conceptual similarities and differences. Two main paradigms for quantum hardware are then discussed: quantum annealing and gate-based quantum computing. While quantum annealers are effective for some optimisation problems, they have limitations and cannot be used for universal quantum computation. In contrast, gate-based quantum computers offer the potential for universal quantum computation, but they face challenges with hardware limitations and accurate gate implementation. The paper provides a detailed mathematical discussion with references to key works in the field, as well as a more practical discussion with relevant examples.The most popular techniques for quantum optimisation on gate-based quantum computers, the quantum approximate optimisation (QAO) algorithm and the quantum alternating operator ansatz (QAOA) framework, are discussed in detail. However, it is still unclear whether these techniques will yield quantum advantage, even with advancements in hardware and noise reduction. The paper concludes with a discussion of the challenges facing quantum optimisation techniques and the need for further research and development to identify new, effective methods for achieving quantum advantage.

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Optimizing Ansatz Design in QAOA for Max-cut

Cited by 10 publications

References 14 publications

Scaling Quantum Approximate Optimization on Near-term Hardware

Scaling Quantum Approximate Optimization on Near-term Hardware

Depth Optimized Ansatz Circuit in QAOA for Max-Cut

A practitioner’s guide to quantum algorithms for optimisation problems

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