Optimized Design of the Neutral Inductor and Filter Inductors in Three-Phase Four-Wire Inverter With Split DC-Link Capacitors

Lin, Zhiheng; Ruan, Xinbo; Jia, Lei; Zhao, Wenhui; Liu, Haitao; Rao, Peinan

doi:10.1109/tpel.2018.2812278

Cited by 44 publications

(30 citation statements)

References 20 publications

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“…This equation can also be written as (7), and the switching state is shown in Fig 6(b) [26], [27]. From the equation and the figure, the effect of offset voltage is the same for TPTLI and TPFLI.…”

Section: B a Carrier-based Pwm Method(cbpwm)mentioning

confidence: 98%

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Minimum Loss Discontinuous Pulse-Width Modulation Per Phase Method for Three-Phase Four-Leg Inverter

2020

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The three-phase four-leg inverter (TPFLI) provides unbalanced voltage to a load or injects unbalanced current to a grid to compensate unbalanced current. However, it has a high switching loss because of the fourth leg. This paper presents a discontinuous pulse-width modulation (DPWM) method that minimizes the per-phase switching loss of the TPFLI. The discontinuous three-dimensional spacevector pulse-width modulation (3D SVPWM) can be implemented in the TPFLI by injecting the same offset voltage as the conventional DPWM of three-phase three-leg inverter (TPTLI). However, the conventional DPWM is unsuitable for TPFLI because of its unbalanced current. We demonstrate that the discontinuous phase can be chosen according to the offset direction when a voltage reference vector is specified. Based on this result, a new per-phase minimum-loss discontinuous PWM strategy is developed and compared with the conventional DPWM. This method can also be applied to the TPTLI and implemented by injecting an offset voltage generated using the inverter phase voltage reference and phase current. Furthermore, the lifespan of a TPFLI can be extended by preventing deterioration of a specific leg. The validity of the proposed method is verified through simulation and experiments. INDEX TERMS Discontinuous pulse width modulation (DPWM), three-dimensional space vector pulse width modulation (3D SVPWM), three-phase four-leg inverter, switching loss

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Section: B a Carrier-based Pwm Method(cbpwm)mentioning

confidence: 98%

“…The structure is the simplest and has the least number of switches. However, the capacity of the DC-link capacitor is quite large for alleviating the capacitor voltage ripple caused by the current flowing in the midpoint of the capacitors [6], [7].…”

Section: Introductionmentioning

confidence: 99%

Minimum Loss Discontinuous Pulse-Width Modulation Per Phase Method for Three-Phase Four-Leg Inverter

2020

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“…It contributes to ensure the overall stability and attenuate the neutral point voltage ripple. In [6], the authors presented the optimisation technique to select the optimal neutral inductor and filter inductors. The design of the optimal filter inductors is limited to a specific controller and modulation technique.…”

Section: Introductionmentioning

confidence: 99%

Active DC‐link balancing and voltage regulation using a three‐level converter for split‐link four‐wire system

Manandhar

Zhang

Gooi

et al. 2020

IET power electron.

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“…Existing solutions for neutral point creation in 3P4W shunt APFs can be classified into three categories: conventional split dc bus [5,9,10], fourth-switching-leg [11,12], and actively controlled split bus (ACSB) [13][14][15][16]. As it shown in Fig.…”

Section: Introductionmentioning

confidence: 99%

Fast Voltage Stabilization Control of Split DC Bus Midpoint in 3P4W Shunt APFs

Tibola

Duarte

et al. 2019

2019 21st European Conference on Power Electronics and Applications (EPE '19 ECCE Europe)

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Optimized Design of the Neutral Inductor and Filter Inductors in Three-Phase Four-Wire Inverter With Split DC-Link Capacitors

Cited by 44 publications

References 20 publications

Minimum Loss Discontinuous Pulse-Width Modulation Per Phase Method for Three-Phase Four-Leg Inverter

Minimum Loss Discontinuous Pulse-Width Modulation Per Phase Method for Three-Phase Four-Leg Inverter

Active DC‐link balancing and voltage regulation using a three‐level converter for split‐link four‐wire system

Fast Voltage Stabilization Control of Split DC Bus Midpoint in 3P4W Shunt APFs

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