Optimization of Tungsten Plug Thin Film Process to Improve the Fill Seam and Contact Resistance in 180nm CMOS Technology

Chauhan, A.K.; Teja, V.S.; Chawla, P.; Sharma, A.K.; Attri, R.; Gupta, M.; Singh, M.K.; Wadhwa, M.

doi:10.1109/edtm58488.2024.10511484

2024 8th IEEE Electron Devices Technology &Amp;amp; Manufacturing Conference (EDTM) 2024

DOI: 10.1109/edtm58488.2024.10511484

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Optimization of Tungsten Plug Thin Film Process to Improve the Fill Seam and Contact Resistance in 180nm CMOS Technology

A.K. Chauhan,

V.S. Teja,

P. Chawla

et al.

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Optimization of Tungsten Plug Thin Film Process to Improve the Fill Seam and Contact Resistance in 180nm CMOS Technology

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References 10 publications

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