2011
DOI: 10.1002/pssa.201026745
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Optimization of thin film silicon solar cells on highly textured substrates

Abstract: Doped layers made of nanostructured silicon phases embedded in a silicon oxide matrix were implemented in thin film silicon solar cells. Their combination with optimized deposition processes for the silicon intrinsic layers is shown to allow for an increased resilience of the cell design to the substrate texture, with high electrical properties conserved on rough substrates. The presented optimizations thus permit turning the efficient light trapping provided by highly textured front electrodes into increased … Show more

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Cited by 87 publications
(59 citation statements)
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“…The pH2 treatments were performed in a plasma enhanced chemical vapor deposition (PECVD) reactor, at 200°C, 0.5 mbar, for 20 minutes, with a power density of 12.3 W/cm 2 (200W). P-i-n solar devices were deposited by PECVD also in KAI large-area reactors [10]. A white dielectric polymer was used as back reflector.…”
Section: Methodsmentioning
confidence: 99%
“…The pH2 treatments were performed in a plasma enhanced chemical vapor deposition (PECVD) reactor, at 200°C, 0.5 mbar, for 20 minutes, with a power density of 12.3 W/cm 2 (200W). P-i-n solar devices were deposited by PECVD also in KAI large-area reactors [10]. A white dielectric polymer was used as back reflector.…”
Section: Methodsmentioning
confidence: 99%
“…We further seek to fabricate a bottom-limited device since such devices typically exhibit higher FF compared to top-limited devices because of the higher electronic quality of the mc-Si:H intrinsic material [39,40]. Therefore, we introduce an AIR that consists of a 1.1-mm-thick NID LP-CVD ZnO layer to enhance the top-cell J sc as previously reported by Söderström et al [29] and Bugnon et al [30] in the n-i-p and p-i-n configurations, respectively. We change the roughness of the AIR by applying a pure O 2 plasma treatment which increases the lateral resistivity of the layer without compromising the out-of-plane conductivity.…”
Section: Effect Of Air Roughness On Micromorph Cell Performancementioning
confidence: 99%
“…We deposited an absorber layer with a thickness of 1.7 mm using deposition processes which enable the improvement of the cell resilience to the substrate morphology [26,29]. The electrical performance of cells shown in Fig.…”
Section: Effect Of the Deposition Temperature Of The Ag Back Reflectormentioning
confidence: 99%
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“…2). Mixed-phase nc-SiO x layers have also proven to enable a more tolerant cell design [19], as their low in-plane conductivity limits the negative impact of porous regions (often called cracks marked by ellipses in Fig. 2) in the silicon absorber layer(s) occurring on rough substrates [20], while the high transverse conductivity of the aligned silicon filaments across the layer ensures efficient carrier extraction.…”
Section: Nanocrystalline Doped Silicon/silicon Oxide Layersmentioning
confidence: 99%