Optimization of nMOS high-frequency transistor characteristics for application in MMICs

Abstract

In this paper, we present the high-frequency (HF) performance of coplanar nMOS transistors with a gate length of 0.1 pm. During device fabrication, several splits ffor the extension implantations have been chosen in order to investigate the DC and HF performance. In our experiment, it is shown that the DC characteristics of the devices with the lowest extension implantation dose give the best result in terms of the shortchannel effect, while the HF performance shows the optimum for the highest implantation dose. This shows that the sourcddrain junction architecture plays a key role in both digital and analog applications.