Optimization of Boundary Scan Tests Using FPGA-Based Efficient Scan Architectures

Aleksejev, Igor; Devadze, Sergei; Jutman, Artur; Shibin, Konstantin

doi:10.1007/s10836-016-5588-y

Cited by 1 publication

(2 citation statements)

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“…We have performed investigation of "preferred" area of occurrence for each defect class, and defined approximation criteria that can be used for new component: extrapolate the number from similar components. A gap in test coverage of board assemblies that resulted from insufficient measures available to the industry and in the literature in respect of handling Timing Related Faults (TRF) has been identified [JUT15]. We have carried out a study on intermittent resistive faults (IRF), a typical category of NFF.…”

Section: A Investigation Of the No Fault Found Phenomenonmentioning

confidence: 99%

“…We considered how defects should be detected early within the test flow. Traditional net and pin-level static fault models have been extended towards TRFs in a way that enables straightforward integration with existing board test coverage analysis tools as well as detailed quantification of the "A" category in PCOLA/SOQ/FAM coverage metric [JUT15]. We also investigated the influence of ageing faults on the test-coverage metrics.…”

Section: Improvement Of Test Coverage Metricsmentioning

confidence: 99%

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BASTION: Board and SoC test instrumentation for ageing and no failure found

Jutman¹,

Lotz²,

Larsson

et al. 2017

Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE), 2017

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This is an overview paper that motivates and describes performed work done in the European Commission funded research project BASTION, which focuses on two critical problems of modern electronics: the No-Fault-Found (NFF) and CMOS ageing. New defect classes contributing to NFF have been identified, including timing related faults (TRF) at board level and intermittent resistive faults (IRF) at IC level. BASTION has addressed the mechanisms of ageing and developed several techniques to improve the longevity of electronic products. Embedded Instrumentation, monitors, and IEEE 1687 standard for reconfigurable scan networks (RSN) are seen as an important leverage that helped mitigating the impact of the above listed problems by facilitating a low-latency, scalable online system health monitoring and error localization infrastructure as well as integration of all heterogeneous technologies into a homogeneous demonstration platform. This paper helps the reader to get a general overview of the work performed and provides a collection of references to publications where the respective research results are described in detail.

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Section: A Investigation Of the No Fault Found Phenomenonmentioning

confidence: 99%

Section: Improvement Of Test Coverage Metricsmentioning

confidence: 99%