Optimization of Arithmetic Datapaths with Finite Word-Length Operands

Abstract

This paper presents an approach to area optimization of arithmetic datapaths that perform polynomial computations over bit-vectors with finite widths. Examples of such designs abound in DSP for audio, video and multimedia computations where the input and output bit-vector sizes are dictated by the desired precision. A bit-vector of size m represents integer values reduced modulo 2 m (%2 m ). Therefore, finite wordlength bit-vector arithmetic can be modeled as algebra over finite integer rings, where the bit-vector size dictates the ring cardinality. This paper demonstrates how the number-theoretic properties of finite integer rings can be exploited for optimization of bit-vector arithmetic. Along with an analytical model to estimate the implementation cost at RTL, two algorithms are presented to optimize bit-vector arithmetic. Experimental results, conducted within practical CAD settings, demonstrate significant area savings due to our approach.I. Introduction RTL descriptions of integer datapaths that implement polynomial arithmetic are found in many practical applications, such as in digital signal processing (DSP) for audio, video and multimedia applications [1] [2]. Such designs perform a sequence of add, mult, shift type of algebraic computations over bit-vectors; hence they are generally modeled at RTL or behavioural-level as multi-variate polynomials of finite degree [2] [3]. Initial algorithmic specifications (such as a matlab model) of such systems involve data representation using floating-point formats. However, they are often implemented with fixed-point architectures in order to optimize the area, delay and power related costs of the implementation [4]. Subsequently, the fixedpoint model can be translated into an RTL description [5] -that can be subsequently synthesized into a circuit.Algebraic techniques and tools have been used for synthesis and optimization of such systems. However, for their efficient and correct modeling, it is important to account for the effect of bit-vector size of the operands on the resulting computation. In other words, a bit-vector of size m represents integer values from 0 to 2 m -1 (or integers reduced modulo 2 m ). This implies that finite word-length (m) bit-vector arithmetic manifests itself as algebra over finite integer rings (Z2m ). Properties of such finite rings should therefore be exploited for RTL optimization of bitvector arithmetic.This paper models finite word-length bit-vector arithmetic as polynomial functions (or polyfunctions) over f : Z 2 n 1 ×

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Abstraction of Polynomial Functions from Arithmetic Transform for Fixed-Size Arithmetic Datapath

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