Optimization of an SSHC-Based Full Active Rectifier for Piezoelectric Energy Harvesting

Abstract

This paper presents a compact and efficient integrated interface circuit for piezo-electric energy harvesting. While the state-of-the-art interface circuits require the use of either an external inductor or a significant number of additional capacitors to achieve high voltage flip and improve power efficiency, the proposed Full Active Rectifier on Flipping Capac-itor (FAR-FC) is based on a reduced set of flipping capacitors and an active rectifier to efficiently flip the voltage across the piezoelec-tric transducer. In addition, this optimized SSHC circuit reaches better power efficiency when the piezoelectric transducer is operating under low mechanical excitation, i.e. when the open-circuit voltage of the piezoelectric transducer is V oc = 1V , while this value is usually V oc ≥ 2V in literature. Furthermore, the FAR-FC supports piezo-electric transducers with higher inherent capacitance values compared to those usually reported in literature, which makes the circuit potentially suitable for a larger variety of MEMS applications. The interface circuit was designed and fabricated in a 0.35-µm CMOS process. Measurement results show that the voltage flip efficiency goes up to 90%. It also reveals that the proposed FAR-FC circuit achieves power performance up to 5.64× higher than a conventional full-bridge rectifier.