Optimization for application-specific packet-based on-chip interconnects using a cycle-accurate model

Shih, Yu-Ju; Huang, Chih-Tsun; Liou, Jing-Jia; Lai, Jyu-Yuan; Wang, Chih-Wea; Wu, Cheng‐Li

doi:10.1109/vlsi-dat.2017.7939676

2017 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) 2017

DOI: 10.1109/vlsi-dat.2017.7939676

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Optimization for application-specific packet-based on-chip interconnects using a cycle-accurate model

Yu-Ju Shih

Chih-Tsun Huang

Jing-Jia Liou

et al.

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Optimization for application-specific packet-based on-chip interconnects using a cycle-accurate model

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