Optimization and scaling of an SOI TFET with back gate control

Mitra, Suman Kr.; Goswami, Rupam; Bhowmick, Brinda

doi:10.1109/rdcape.2015.7281360

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Cited by 3 publications

References 16 publications

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Design, simulation and analog/RF performance evaluation of a hetero-stacked source dual metal T-shaped gate tunnel-FET in thermally variable environments

Kumar,

Bhaskar,

Chotalia

et al. 2024

Microsyst Technol

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Design, simulation and analog/RF performance evaluation of a hetero-stacked source dual metal T-shaped gate tunnel-FET in thermally variable environments

Kumar,

Bhaskar,

Chotalia

et al. 2024

Microsyst Technol

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Evolution of Tunnel Field Effect Transistor for Low Power and High Speed Applications: A Review

Babu

Goel

2022

Silicon

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A High Schottky Barrier iTFET with Control Gate for Low Power Application

Lin,

Tse

2023

Preprint

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This research presents a simulated device structure for an Inductive Line Tunneling Tunnel Field-Effect Transistor (iTFET) with a high Schottky barrier and a control gate. We based our design process on real-world production components, factored in actual processing steps, and verified all software parameters to ensure the study's close alignment with practical manufacturing scenarios. Our configuration employs Silicon Germanium (SiGe), a narrow-bandgap semiconductor known for its cost-effectiveness, mature technology, and ability to enhance electron tunneling. We implemented Schottky Barrier Height (SBH) modulation engineering to increase the ON- state current (ION) by integrating an electrode into the semiconductor via Schottky contact. To further optimize the device performance, a control gate was included between the source and drain regions. This modification increased the ION and reduced the OFF-state current (IOFF) through the manipulation of the electric field. The simulation results demonstrated an average subthreshold swing (SSAVG) of 31.5 mV/dec, an ION of 4.96x10-6 A/μm, and an ION/IOFF ratio of 1.1x108 at a VDS of 0.2V, indicating a remarkably low subthreshold swing. These outcomes highlight the feasibility of utilizing a low thermal budget approach to fabricate high-performing TFETs that are well-suited for economical and low-energy applications.

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Optimization and scaling of an SOI TFET with back gate control

Cited by 3 publications

References 16 publications

Design, simulation and analog/RF performance evaluation of a hetero-stacked source dual metal T-shaped gate tunnel-FET in thermally variable environments

Design, simulation and analog/RF performance evaluation of a hetero-stacked source dual metal T-shaped gate tunnel-FET in thermally variable environments

Evolution of Tunnel Field Effect Transistor for Low Power and High Speed Applications: A Review

A High Schottky Barrier iTFET with Control Gate for Low Power Application

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