Optimised switching of a SiC MOSFET in a VSI using the body diode and additional Schottky barrier diode

Horff, Roman; März, Andreas; Lechler, Martin; Bakran, Mark-M.

doi:10.1109/epe.2015.7309102

Cited by 15 publications

(8 citation statements)

References 3 publications

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“…11 represents the turn-on, the turn-off and the recovery energy losses (Eon, Eoff and Erec respectively) as a function of the load's current, all for TJ = 25°C and 100°C. It can be seen that Erec is largely lower than the other switching energies and seems to confirm the results proposed in [16][17][18].…”

Section: B Losses Estimationsupporting

confidence: 87%

“…Usually, these energy losses are given in the datasheet, however Erec is not provided for this power module. Despite this, the reverse recovery energy of the MOSFET's body diode was found to be low in several recent studies [16][17][18]. Hence in order to verify this theory and obtain more accurate values of Eon and Eoff, the double pulse test was applied.…”

Section: B Losses Estimationmentioning

confidence: 99%

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Power Semiconductor Ageing Test Bench Dedicated to Photovoltaic Applications

Dbeiss

Avenas

2019

IEEE Trans. on Ind. Applicat.

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This paper presents a new concept of semiconductor ageing test benches dedicated to photovoltaic inverters. The ageing profile is obtained by analyzing mission profiles of the current and the ambient temperature, extracted over several years from different photovoltaic plants. Accordingly, the ageing test is done by applying power cycling under variable ambient temperature, using power semiconductors in a Pulse Width Modulation inverter and under nominal conditions. The measurement and estimation of power losses and thermal models are then used to choose the ageing profile parameters adapted to the experimental setup. Finally, the preliminary experimental results of the accelerated ageing tests are presented in the case of silicon carbide MOSFETs power semiconductors. These results show a remarkable increase in the gate to source threshold voltage, the leakage currents and the drain to source on resistance.

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Section: B Losses Estimationsupporting

confidence: 87%

Section: B Losses Estimationmentioning

confidence: 99%

Power Semiconductor Ageing Test Bench Dedicated to Photovoltaic Applications

Dbeiss

Avenas

2019

IEEE Trans. on Ind. Applicat.

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“…Moreover, the current I C will be distributed between the SiC MOSFET T2 and the SBD diode D2. The current distribution will depend on the ON resistance (R DS ) of the MOSFET, the forward voltage drop of the SiC SBD diode (V F ) and the diode dynamic resistance (R F ) [37]. Indeed the described switching operation is very different from what is seen in the 3L silicon-based topology.…”

Section: L Asym-voltage Level Generation and Output Currentmentioning

confidence: 98%

Asymmetrical Three-Level Inverter SiC-Based Topology for High Performance Shunt Active Power Filter

Iturra

Thiemann

2019

Energies

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Power quality conditioner systems, such as shunt active power filters (SAPFs), are typically required to have low power losses, high-power density, and to produce no electromagnetic interference to other devices connected to the grid. At the present, power converters with such a features are built using multilevel topologies based on pure silicon semiconductors. However, recently new semiconductors that offer massive reduction of power losses such as silicon carbide (SiC) MOSFETs have been introduced into the power electronics field. In the near future, the applications that demand the highest performance will be powered by multilevel converters based on SiC. In this paper a highly efficient three-level (3L) topology based entirely on silicon carbide (SiC) semiconductors for a SAPF is presented and analyzed in great detail. Furthermore, the proposed topology is compared with other full SiC-based conventional topologies: two level (2L), three-level T-type (3L-TNPC), and three-level neutral-point-clamped (3L-NPC) in terms of efficiency. The proposed asymmetrical topology has an efficiency superior to conventional all SiC 2L and 3L power circuits when the pulse or switching frequency of the system is set higher than 60 kHz. Further, for high current ratings, the asymmetrical topology has the advantage that it can be built just by cascading two half-bridge SiC modules.

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“…A SiC SBD has a relatively low forward voltage drop and almost no reverse recovery charge. Embedded PiN diodes in SiC MOSFETs can also be used as freewheeling diodes, but they have a large forward voltage drop and a large reverse recovery Materials 2021, 14, 3554 2 of 13 charge and time; therefore, power module systems with SiC SBDs result in better switching losses [11].…”

Section: Introductionmentioning

confidence: 99%

4H-SiC Double Trench MOSFET with Split Heterojunction Gate for Improving Switching Characteristics

Cheon

Kim

2021

Materials

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In this paper, a novel 4H-SiC split heterojunction gate double trench metal-oxide-semiconductor field-effect transistor (SHG-DTMOS) is proposed to improve switching speed and loss. The device modifies the split gate double trench MOSFET (SG-DTMOS) by changing the N+ polysilicon split gate to the P+ polysilicon split gate. It has two separate P+ shielding regions under the gate to use the P+ split polysilicon gate as a heterojunction body diode and prevent reverse leakage `current. The static and most dynamic characteristics of the SHG-DTMOS are almost like those of the SG-DTMOS. However, the reverse recovery charge is improved by 65.83% and 73.45%, and the switching loss is improved by 54.84% and 44.98%, respectively, compared with the conventional double trench MOSFET (Con-DTMOS) and SG-DTMOS owing to the heterojunction.

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Optimised switching of a SiC MOSFET in a VSI using the body diode and additional Schottky barrier diode

Cited by 15 publications

References 3 publications

Power Semiconductor Ageing Test Bench Dedicated to Photovoltaic Applications

Power Semiconductor Ageing Test Bench Dedicated to Photovoltaic Applications

Asymmetrical Three-Level Inverter SiC-Based Topology for High Performance Shunt Active Power Filter

4H-SiC Double Trench MOSFET with Split Heterojunction Gate for Improving Switching Characteristics

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