Optimal tiling for the RNA base pairing problem

González, Daniel Lombraña; González, Jesús; Moreno, L.; González, Francisco de Sande; Mesa, F.; Blanco, Vicente; León, Casiano Rodríguez; Andonov, Rumen; Rodríguez, Manuel González; Hernández, Coromoto León; Poirriez, Vincent

doi:10.1145/564898.564901

Cited by 6 publications

(6 citation statements)

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“…The first category [2,9,11,15,18] focuses on reducing the time complexity and communication overhead with different theoretical parallel models. The second category [1,4,10,22,23] focuses on the performance on distributed systems, where the communication overhead cannot be neglected. The third category [7,24,25,26] focuses on the performance on modern multi-core processors.…”

Section: B Related Workmentioning

confidence: 99%

“…As each row is 128-bit wide, we compute the four values in each row of C simultaneously. Let's investigate the first row C [1] of C. It depends on the first row A [1] of A and the entire matrix of B. There are four steps to compute C [1], where each step uses one value in A [1] and the corresponding row in B.…”

Section: A Spe Proceduresmentioning

confidence: 99%

“…Let's investigate the first row C [1] of C. It depends on the first row A [1] of A and the entire matrix of B. There are four steps to compute C [1], where each step uses one value in A [1] and the corresponding row in B. For example, the first step is formulated as C [1] The SIMD procedure of this step is as follows:…”

Section: A Spe Proceduresmentioning

confidence: 99%

“…There are four steps to compute C [1], where each step uses one value in A [1] and the corresponding row in B. For example, the first step is formulated as C [1] The SIMD procedure of this step is as follows:…”

Section: A Spe Proceduresmentioning

confidence: 99%

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Efficient Nonserial Polyadic Dynamic Programming on the Cell Processor

Liu

Wang

Jiang

et al. 2011

2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and PHD Forum

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Dynamic programming (DP) is an effective technique for many search and optimization problems. However, the high arithmetic complexity limits its extensive use. Although modern processor architectures with multiple cores and SIMD (single instruction multiple data) instructions provide increasingly high computing power, even the state-of-the-art fully optimized algorithm still largely underutilizes modern multi-core processors. In this paper we propose to improve one family of DP, nonserial polyadic DP (NPDP), targeting a heterogeneous multi-core architecture, the Cell Broadband Engine. We first design a new data layout which efficiently utilizes the onchip memory system of the Cell processor. Next we devise a CellNPDP algorithm with two tiers. The first tier is a SPE (a co-processor on the Cell processor) procedure which efficiently computes a block of data that can fit into one SPE's local store. The second tier is a parallel procedure which enables all SPEs to efficiently compute all blocks of data. To evaluate CellNPDP, we use both performance modeling and experiments. The performance model reveals that the processor utilization of NPDP can be independent of the problem size. To empirically evaluate CellNPDP, we use two platforms: the IBM QS20 dual-Cell blade and a CPU platform with two latest quad-core CPUs. On both platforms, the processor utilization of CellNPDP is larger than 60%, which demonstrates that our optimizations and CellNPDP can be architecture-independent. Compared to the state-of-the-art fully optimized algorithm on the CPU platform, CellNPDP is 44-fold faster for singleprecision and 28-fold faster for double-precision, which is a significant improvement to NPDP.

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Section: B Related Workmentioning

confidence: 99%

Section: A Spe Proceduresmentioning

confidence: 99%

Section: A Spe Proceduresmentioning

confidence: 99%

Section: A Spe Proceduresmentioning

confidence: 99%

See 2 more Smart Citations

Efficient Nonserial Polyadic Dynamic Programming on the Cell Processor

Liu

Wang

Jiang

et al. 2011

2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and PHD Forum

View full text Add to dashboard Cite

show abstract

“…To achieve the best performance, is mandatory to find a model that represents the optimal distribution of the workload on the processing cores of the device. This is a well known problem in High Performance Computing Systems [9][10][11][12].…”

mentioning

confidence: 99%