Optimal Tasks Assignment for Multiple Heterogeneous Processors with Dynamic Re-assignment

Abstract

Distributed Computing System [DCS] has attracted several researchers by posing several challenging problems. In this paper we have developed a mathematical model for allocating “M” tasks of distributed program to “N” multiple processors (M>N) that minimizes the total cost of the program. Relocating the tasks from one processor to another at certain points during the course of execution of the program that contributes to the total cost of the running program has been taken into account. Most of the researchers have considered the cost for relocating the task from one processor to another processor at the end of the phase as a constant. But in real life situations the reallocating cost of the tasks may very processor to processor this is due to the execution efficiency of the processors. Phase-wise execution cost [EC], inter task communication cost [ITCT], residence cost [RC] of each task on different processors and relocation cost [REC] for each task have been considered while preparing a dynamic tasks allocation model.

Cost Optimization of Distributed Computing System with Dynamic Re-Allocation

“…A dynamic task allocation method is used here to solve task allocation problem and it allocates the tasks to optimize overall task allocation cost. Some of the other related task allocation methods have been reported in literature such asTask Assignment [1, 10,19], task scheduling [2, 3], Distributed Processing Environment [4], Task Allocation [5,7,9,11,13], data communication in Mobile Computing [6], Dynamic Task Allocation [8], Dynamic Tasks Scheduling [12,16,20,22], Dynamic Optimization Algorithm [14], dynamic programming [15], Dynamic Reassignment [17], Dynamic Load Balancing [18] and Dynamic Task Assignment [21].This research solve here a task allocation problem dynamically in DCS by allocating available processors in such a way that overall load should be balanced so system overloading can be avoided by using the proper utilization of processors.…”