Optimal Sizing of Amplifiers by Evolutionary Algorithms with Integer Encoding and $$g_m/I_D$$ Design Method

Sanabria-Borbón, Adriana C.; Tlelo‐Cuautle, Esteban; Fraga, Luis Gerardo de la

doi:10.1007/978-3-319-64063-1_11

Cited by 2 publications

(4 citation statements)

References 30 publications

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“…The surrogate is self-contained and easily adaptable to other optimization techniques like differential evolution [10,14,23], simulated annealing [12], particle swarm optimization [4], Bayesian optimization [9], and even learning-based techniques like neural networks or support vector machines [8]. The optimization framework is implemented in MATLAB R using in-built functions combined with optimization toolboxes [25,36].…”

Section: Methodsmentioning

confidence: 99%

“…Equations (14) and (15) describe some of the most important performance metrics of the CSVCO such as oscillation frequency ( f osc ), total power (P), and phase noise (L) [21,43,44].…”

Section: Surrogate Of the Csvco's Performance Metricsmentioning

confidence: 99%

“…In Reference [9] Gaussian process-based regression models were used as surrogate models in Bayesian optimization, although effective, the surrogate is completely-application specific, requiring new models to be generated for each circuit topology and technology. Moreover, in Reference [14] gm/I D method [15] and circuit equations are used for a smart reduction of the search space before optimization using the simulator. Still, all these approaches require a large number of computationally expensive circuit simulations within the optimization loops.…”

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confidence: 99%

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Gaussian-Process-Based Surrogate for Optimization-Aided and Process-Variations-Aware Analog Circuit Design

et al. 2020

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Optimization algorithms have been successfully applied to the automatic design of analog integrated circuits. However, many of the existing solutions rely on expensive circuit simulations or use fully customized surrogate models for each particular circuit and technology. Therefore, the development of an easily adaptable low-cost and efficient tool that guarantees resiliency to variations of the resulting design, remains an open research area. In this work, we propose a computationally low-cost surrogate model for multi-objective optimization-based automated analog integrated circuit (IC) design. The surrogate has three main components: a set of Gaussian process regression models of the technology’s parameters, a physics-based model of the MOSFET device, and a set of equations of the performance metrics of the circuit under design. The surrogate model is inserted into two different state-of-the-art optimization algorithms to prove its flexibility. The efficacy of our surrogate is demonstrated through simulation validation across process corners in three different CMOS technologies, using three representative circuit building-blocks that are commonly encountered in mainstream analog/RF ICs. The proposed surrogate is 69 X to 470 X faster at evaluation compared with circuit simulations.

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Section: Methodsmentioning

confidence: 99%

“…Equations (14) and (15) describe some of the most important performance metrics of the CSVCO such as oscillation frequency ( f osc ), total power (P), and phase noise (L) [21,43,44].…”

Section: Surrogate Of the Csvco's Performance Metricsmentioning

confidence: 99%

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confidence: 99%

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Gaussian-Process-Based Surrogate for Optimization-Aided and Process-Variations-Aware Analog Circuit Design

et al. 2020

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“…It is highlighted by the significant amount of research demonstrating successful design examples: matching and correcting circuits, filters, mixers, generators, multistage transistor amplifiers, and antennas. Algorithms used for the synthesis of transistor amplifiers include: genetic algorithms (GA), [1][2][3] evolutionary strategy, 4 differential evolution, [5][6][7] neural networks, [8][9][10] machine learning, 11 hybrid backtracking search algorithm, 5 g m / I D algorithm, 3,12 firefly algorithm, 13 bee colony algorithm, 14 cuckoo search algorithm, 15 particle swarm algorithm, 6,16 whale optimization algorithm, 17,18 multi-objective gray wolf optimization, 19 and ant colony algorithm. 20,21 The article considers the development of the integrated microwave distributed amplifiers (DA) synthesis technique.…”

Section: Introductionmentioning

confidence: 99%

A genetic‐algorithm‐based synthesis of microwave integrated distributed amplifiers

Metel

Добуш

Kalentyev

et al. 2023

Int J Numerical Modelling

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This article presents a genetic algorithm‐based technique for microwave integrated distributed amplifier synthesis. To speed‐up synthesis, only linear characteristics are used in the goal function. The technique uses MMIC foundry process design kit models providing manufacturing‐ready schematics to be found. The models from the process design kit are presented as S‐parameters again to enhance algorithm performance. The technique allows searching among most of the existing schematics of the microwave distributed amplifier but is not limited to typical topologies. The section number is theoretically unlimited and makes it possible to find principally new circuit topology. The synthesis shortens and simplifies the distributed amplifier design time. Experimental validation of the technique is carried out by synthesizing the broadband driver stage for the 20–30 GHz buffer amplifier. The technique produces several amplifier topologies meeting the requirements. The most appropriate circuit was manufactured using a commercial 0.25 μm GaAs pHEMT process. The manufactured buffer amplifier demonstrates a gain of 10 dB and 20 dBm output power at a 1 dB compression point.

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Optimal Sizing of Amplifiers by Evolutionary Algorithms with Integer Encoding and $$g_m/I_D$$ Design Method

Cited by 2 publications

References 30 publications

Gaussian-Process-Based Surrogate for Optimization-Aided and Process-Variations-Aware Analog Circuit Design

Gaussian-Process-Based Surrogate for Optimization-Aided and Process-Variations-Aware Analog Circuit Design

A genetic‐algorithm‐based synthesis of microwave integrated distributed amplifiers

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