Optimal DPM and DVFS for frame-based real-time systems

Gerards, Marco E. T.; Kuper, Jan

doi:10.1145/2400682.2400700

Cited by 47 publications

(22 citation statements)

References 26 publications

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“…For the combination of DPM and DVFS, tradeoffs between the two techniques should be considered [8]. When DVFS is used, the clock frequency is decreased to reduce the energy consumption during the execution of tasks, while the execution time increases and the idle time decreases.…”

Section: Low Power Techniquesmentioning

confidence: 99%

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Design Aid of Multi-core Embedded Systems with Energy Model

Nakada

Okamoto

Komoda

et al. 2014

IPSJ Online Transactions

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Shifting to multi-core designs is so pervasive a trend to overcome the power wall and it is a necessary move for embedded systems in our rapidly evolving information society. Meanwhile, the need to increase the battery life and reduce maintenance costs for such embedded systems is very critical. Therefore, a wide variety of power reduction techniques have been proposed and realized, including Clock Gating, DVFS and Power Gating. To maximize the effectiveness of these techniques, task scheduling is a key but for multi-core systems it is very complicated due to the huge exploration space. This problem is a major obstacle for further power reduction. To cope with it, we propose a design method for embedded systems to minimize their energy consumption under performance constraints. This method is based on the clarification of properties of the above mentioned low power techniques and their interactions. In more details, we firstly establish energy models for these low power techniques and our target systems. We then explore for the best configuration by constructing an optimization problem especially for applications which have a longer deadline than the execution interval. Finally, we propose an approximate solution using dynamic programming with a lower computation complexity and compare it to a brute force explicit solution. We confirm with our evaluations that the proposed method successfully found a better configuration which reduces the total energy consumption by 32% if compared to the manually optimized configuration, which utilizes only one core.

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Section: Low Power Techniquesmentioning

confidence: 99%

“…One exception is Ref. [8], they lump two instances by scheduling one instance at the end of a time period and the next instance at the beginning of the next time period. However, this approach cannot lump more than two instances.…”

Section: Related Workmentioning

confidence: 99%

Design Aid of Multi-core Embedded Systems with Energy Model

Nakada

Okamoto

Komoda

et al. 2014

IPSJ Online Transactions

View full text Add to dashboard Cite

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“…This strategy can be modeled with a function of cost against the length of the idle period. This function turns out to be piecewiselinear, increasing and concave [5]. Even if the task sizes are known, NP-hardness of the optimal scheduling algorithm was proven [6].…”

Section: Introductionmentioning

confidence: 99%

An Energy-Efficient Task Scheduling for Near-Realtime Systems with Execution Time Variation

Nakada

Hatanaka

Ueki

et al. 2017

IEICE Trans. Inf. & Syst.

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SUMMARYImproving energy efficiency is critical for embedded systems in our rapidly evolving information society. Near real-time data processing tasks, such as multimedia streaming applications, exhibit a common fact that their deadline periods are longer than their input intervals due to buffering. In general, executing tasks at lower performance is more energy efficient. On the other hand, higher performance is necessary for huge tasks to meet their deadlines. To minimize the energy consumption while meeting deadlines strictly, adaptive task scheduling including dynamic performance mode selection is very important. In this work, we propose an energy efficient slack-based task scheduling algorithm for such tasks by adapting to task size variations and applying DVFS with the help of statistical analysis. We confirmed that our proposal can further reduce the energy consumption when compared to oracle frame-based scheduling.

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“…Recent studies show that the leakage power constitutes more than 40% of the total power consumption, being superlinearly dependent on the chip temperature [3]. This has attracted significant attention in recent years [4]- [10].…”

Section: Introductionmentioning

confidence: 99%

“…Recently, performance impact of DVFS and DCS have been studied using high level application graph models (directed acyclic graphs or synchronous data flow graphs) representing static workload scenarios [9], [10]. The power-temperature inter-dependency is either not incorporated or the influence of ambient temperature is not factored.…”

Section: Introductionmentioning

confidence: 99%

Hardware-software interaction for run-time power optimization: A case study of embedded Linux on multicore smartphones

Das

Walker

Hansson

et al. 2015

2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)

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Abstract-Applications running on smartphones interact with the hardware and the system software differently, resulting in widely varying power consumption and hence thermal profiles. Typically, these smartphone platforms expose some hardware power control features to users, controlled through software governors such as cpufreq for dynamic voltage-frequency scaling (DVFS) and cpuquiet for dynamic core selection (DCS). Operating systems on these platforms manage these governors conservatively, independent of application's performance requirement. To address this, we propose an alternative approach, which uses reinforcement learning to explore the trade-off between power saving opportunities using DVFS and DCS and application's performance at run-time. The objective is to reduce power consumption, taking into consideration dynamic power, leakage power, and the inter-dependency between temperature and power. The reinforcement learning-based control is validated as a casestudy on ARM A15-based nvidia's tegra smartphone through its implementation as a run-time manager (RTM). This RTM interfaces with different hardware performance counters and the embedded Linux Operating System through (1) the cpuquiet API to select cores at run-time; and (2) the cpufreq API to scale the frequency of active cores. Experiments with mobile and high performance applications demonstrate that the proposed approach achieves an average 22% (7-40%) power reduction compared to existing techniques.

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Optimal DPM and DVFS for frame-based real-time systems

Cited by 47 publications

References 26 publications

Design Aid of Multi-core Embedded Systems with Energy Model

Design Aid of Multi-core Embedded Systems with Energy Model

An Energy-Efficient Task Scheduling for Near-Realtime Systems with Execution Time Variation

Hardware-software interaction for run-time power optimization: A case study of embedded Linux on multicore smartphones

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