Optimal Carrier Frequency Swapping for PD-PWM in Modular Multilevel Converter

Arslan, Ali Osman; Eroğlu, Fatih; Kurtoğlu, Mehmet; Vural, Ahmet Mete

doi:10.1109/ismsit.2019.8932762

Cited by 3 publications

(3 citation statements)

References 11 publications

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“…But, in case of level shifted PWM, only the positions of positive/negative peaks are altered in accordance with the module number while the phase angles of the carriers are kept equal. PDPWM is the sub category of the level shifted PWM technique in which N-1 carriers are used to generate N-level voltage at the output (Arslan et al, 2019). The simulation model of the PDPWM technique used in this work is shown in Figure 2.…”

Section: Phase Disposition Pulse Width Modulationmentioning

confidence: 99%

Design and Experimental Verification of a Single-Phase Asymmetric Hybrid Multi-level Inverter

Vural

Arslan

Deniz

2020

EJEST

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In recent years, multi-level inverters have emerged as a feasible power conversion solution for medium and high power applications due to better harmonic performance and ability to operate at high voltage/power when compared to traditional two-level inverters. Since the output level of the multi-level inverters depends on the number of the switching elements, as more levels are required, more switching elements are used. This situation makes the circuit and the control design complex and the losses to upsurge. To overcome these limitations and produce low harmonic content at the output, reduced switch count topologies are popular. In this study, a single-phase asymmetric hybrid multi-level inverter is proposed by combining diode clamped and cascaded H-bridge topologies. The inputs of the proposed inverter are selected as two unequal DC voltage sources. In this regard, fewer switching elements are used to obtain the same number of voltage levels at the output when compared to traditional multi-level inverters. The efficiency and the harmonic performance of the proposed topology is both verified by simulation and experimental studies. The gating signals of the semiconductor switches are produced by phase disposition pulse width modulation with carriers’ frequency of 4 kHz. It is shown by the experiments that a maximum efficiency of 94 % and a total harmonic distortion of 29 % are attained in the case studies.

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Section: Phase Disposition Pulse Width Modulationmentioning

confidence: 99%

Design and Experimental Verification of a Single-Phase Asymmetric Hybrid Multi-level Inverter

Vural

Arslan

Deniz

2020

EJEST

Self Cite

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“…[20][21][22][23][24] By rotating the carrier waveforms, sensors can be eliminated for the SM capacitor voltage balancing. 25 But, the need of generating multiple triangular carrier waveforms becomes burden to the processor with the increase in SM number. To the best of the authors' knowledge, a level enhanced (2N + 1) single-carrier PDPWM without voltage and current measurements has been not found for MMC in the literature.…”

Section: Introductionmentioning

confidence: 99%

“…However, voltage and current sensors are required for the voltage balance control 20–24 . By rotating the carrier waveforms, sensors can be eliminated for the SM capacitor voltage balancing 25 . But, the need of generating multiple triangular carrier waveforms becomes burden to the processor with the increase in SM number.…”

Section: Introductionmentioning

confidence: 99%

A level enhanced voltage balancing method for modular multilevel converter without using sensors

Gobburi

Borghate

Meshram

2022

Circuit Theory & Apps

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The intrinsic characteristics such as modular structure, filterless operation, and absence of DC-link capacitor have made the modular multilevel converter (MMC) superior to the conventional multilevel converters. However, the submodule (SM) capacitor voltage balancing is crucial. This paper presents a voltage balance control method for MMC. The proposed method generates 2N + 1 levels (where N is the number of SMs per arm) which halves the step size of output voltage and improves the harmonic performance as compared to N + 1 level generation. It requires only one carrier per phase and no voltage and current measurements are needed for the implementation. Therefore, the proposed method makes the system cost-effective and reduces the implementation issues related with carrier-based methods substantially. It also alleviates the non-uniform charge distribution problem with the phase disposition pulse width modulation (PDPWM) technique. Further, a detailed mathematical analysis is presented which enhances the understanding of balancing algorithm. In addition to this, the circulating current with 2N + 1 modulation is analyzed and a control technique is presented. The proposed voltage balancing method is simulated comprehensively in MATLAB/SIMULINK software and validated by the experimental results obtained from a laboratory prototype.

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Control for Efficiency of Modular Multilevel Converter with Variable-Rotation-Frequency Phase Disposition Modulation

Zhou,

He,

Zhao

et al. 2024

2024 IEEE 10th International Power Electronics and Motion Control Conference (IPEMC2024-ECCE Asia)

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Optimal Carrier Frequency Swapping for PD-PWM in Modular Multilevel Converter

Cited by 3 publications

References 11 publications

Design and Experimental Verification of a Single-Phase Asymmetric Hybrid Multi-level Inverter

Design and Experimental Verification of a Single-Phase Asymmetric Hybrid Multi-level Inverter

A level enhanced voltage balancing method for modular multilevel converter without using sensors

Control for Efficiency of Modular Multilevel Converter with Variable-Rotation-Frequency Phase Disposition Modulation

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