Optical Ring Network-on-Chip (ORNoC): Architecture and design methodology

Abstract

Abstract-State-of-the-art System-on-Chip (SoC) consists of hundreds of processing elements, while trends in design of the next generation of SoC point to integration of thousand of processing elements, requiring high performance interconnect for high throughput communications. Optical on-chip interconnects are currently considered as one of the most promising paradigms for the design of such next generation MultiProcessors System on Chip (MPSoC). They enable significantly increased bandwidth, increased immunity to electromagnetic noise, decreased latency, and decreased power. Therefore, defining new architectures taking advantage of optical interconnects represents today a key issue for MPSoC designers. Moreover, new design methodologies, considering the design constraints specific to these architectures are mandatory. In this paper, we present a contention-free new architecture based on optical network on chip, called Optical Ring Network-on-Chip (ORNoC). We also show that our network scales well with both large 2D and 3D architectures. For the efficient design, we propose automatic wavelength-/waveguide assignment and demonstrate that the proposed architecture is capable of connecting 1296 nodes with only 102 waveguides and 64 wavelengths per waveguide.

Designing Low-Power, Low-Latency Networks-on-Chip by Optimally Combining Electrical and Optical Links

“…Passive microring resonator based ONoCs are referred to as Wavelength-Routed ONoCs (WRONoCs). Nonblocking WRONoC topologies [40,41,42,43] provide simultaneous switching capability from each sender to each receiver; however, this requires (N − 1) filters at each node, leading to very limited scalability in terms of power as the number of rings is proportional to ring heater power. To tackle this, several WRONoCs [14,7,44] have been proposed that require only one filterdetector pair at each node and resolve contention by using a control network like QuT.…”

Olympic: A Hierarchical All-Optical Photonic Network for Low-Power Chip Multiprocessors

“…Even if proposals of simpler topologies and organizations exist [4], [10], [9], the number and kind of required photonic elements is still biased towards a certain degree of complexity in terms of number of waveguides and/or making use of numerous Photonic Switching Elements (PSE) [10], [9].…”

An Optimization Algorithm to Build Low Congestion Multi-Ring Topology for Optical Network-on-Chip

“…The optical configuration requires that each wavelength must be statically assigned to a given optical network interface, limiting the achievable parallelism. Le Beux et al [11] presented an optical ring NoC (ORNoC) for both 2-D and 3-D architecture. In ORNoC, a wavelength can be reused in a waveguide such that it can also support multiple transactions to improve the performance.…”

“…Hence, the complexity and cost will limit the scalability of Corona. ORB [10] and ORNoC [11] are also proposed to decrease the blocking by exploiting wavelength division multi-placing (WDM) and wavelength assignment. The scalability of network is still a problem because the number of available wavelengths is limited.…”