Optical Receiver Front-End for 50G PON in 40nm CMOS

Ran, Nianquan; Li, Jia; Ma, Shuaizhe; Yang, Yumei; Zhao, Wanqing; Li, Hao; Li, Dan

doi:10.1109/icta56932.2022.9962967

Search citation statements

Order By: Relevance

Paper Sections

Select...

The 2d Integration1

Citation Types

Supporting

Mentioning

Contrasting

Year Published

2024

Publication Types

Select...

Article1

Relationship

Self Cite0

Independent1

Authors

Journals

Cited by 1 publication

(1 citation statement)

References 4 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…[68] Xi'an Jiaotong University designed a low-power TIA chip for 50G PON. [69] In 2023, Peking University demonstrated a 16-channel silicon transmitter based on co-designed PICs and electrical chiplets. The power consumption of the Si transmitter with a high integration density featuring a throughput up to 800 Gb/s is only 5.35 pJ/bit.…”

Section: The 2d Integrationmentioning

confidence: 99%

Silicon-based optoelectronic heterogeneous integration for optical interconnection

Li 李,

Zhang 张

et al. 2024

Chinese Phys. B

View full text Add to dashboard Cite

The performance of optical interconnection has improved dramatically in recent years. Silicon-based optoelectronic heterogeneous integration is the key enabler to achieve high performance optical interconnection, which not only provides the optical gain which is absent from native Si substrates and enables complete photonic functionalities on chip, but also improves the system performance through advanced heterogeneous integrated packaging. This paper reviews recent progress of silicon-based optoelectronic heterogeneous integration in high performance optical interconnection. The research status, development trend and application of ultra-low loss optical waveguides, high-speed detectors, high-speed modulators, lasers and 2D, 2.5D, 3D and monolithic integration are focused on.

show abstract

Section: The 2d Integrationmentioning

confidence: 99%