Optical and electrical characterization of hafnium oxide deposited by liquid injection atomic layer deposition

Taechakumput, Pouvanart; Taylor, Stephen; Buiu, O.; Potter, Richard J.; Chalker, Paul R.; Jones, Anthony

doi:10.1016/j.microrel.2007.01.049

Cited by 10 publications

(3 citation statements)

References 21 publications

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“…4) Compared with SiO 2 gate dielectrics, nevertheless, high-κ materials usually have a greater number of intrinsic defects, which might degrade device performance. 5,6) Although most high-κ gate dielectrics are commonly subjected to a high-temperature post deposition annealing (PDA) process to improve device performance, 7,8) the PDA process is not compatible with the fabrication of low-temperature TFTs on flexible substrates. 9,10) For the past decade, various techniques compatible with low-temperature processing were proposed to enhance the quality of high-κ dielectrics.…”

Section: Introductionmentioning

confidence: 99%

A room temperature process for the fabrication of amorphous indium gallium zinc oxide thin-film transistors with co-sputtered Zr_xSi₁₋_xO₂Gate dielectric and improved electrical and hysteresis performance

Hung

Wang

Liu

et al. 2017

Jpn. J. Appl. Phys.

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The use of co-sputtered zirconium silicon oxide (Zr x Si 1%x O 2 ) gate dielectrics to improve the gate controllability of amorphous indium gallium zinc oxide (α-IGZO) thin-film transistors (TFTs) through a room-temperature fabrication process is proposed and demonstrated. With the sputtering power of the SiO 2 target in the range of 0-150 W and with that of the ZrO 2 target kept at 100 W, a dielectric constant ranging from approximately 28.1 to 7.8 is obtained. The poly-structure formation immunity of the Zr x Si 1%x O 2 dielectrics, reduction of the interface trap density suppression, and gate leakage current are examined. Our experimental results reveal that the Zr 0.85 Si 0.15 O 2 gate dielectric can lead to significantly improved TFT subthreshold swing performance (103 mV/dec) and field effect mobility (33.76 cm 2 V %1 s %1 ).

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Section: Introductionmentioning

confidence: 99%

A room temperature process for the fabrication of amorphous indium gallium zinc oxide thin-film transistors with co-sputtered Zr_xSi₁₋_xO₂Gate dielectric and improved electrical and hysteresis performance

Hung

Wang

Liu

et al. 2017

Jpn. J. Appl. Phys.

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“…Its crystallization temperature can be raised if related silicates (e.g., HfSiO 4 ) or nitrided alloys are fabricated. A potential ALD precursor using the organometallic cyclopentadienyl is also recently investigated by Taechakumput et al [32]. This precursor shows promising results as an alternative for producing high-quality HfO 2 films with low impurities.…”

Section: Hf-based Gate Oxide Dielectricsmentioning

confidence: 99%

“…Figure 18: Effect of postdeposition annealing on normalized C-V characteristics (positive sweep) [32].…”

Section: Electrical Properties Of High-k Filmsmentioning

confidence: 99%

Advanced CMOS Gate Stack: Present Research Progress

Zhao

Werner

Taylor

et al. 2012

ISRN Nanotechnology

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The decreasing sizes in complementary metal oxide semiconductor (CMOS) transistor technology require the replacement of SiO 2 with gate dielectrics that have a high dielectric constant (high-k). When the SiO 2 gate thickness is reduced below 1.4 nm, electron tunneling effects and high leakage currents occur which present serious obstacles for device reliability. In recent years, various alternative gate dielectrics have been researched. Following the introduction of HfO 2 into the 45 nm process by Intel in 2007, the screening and selection of high-k gate stacks, understanding their properties, and their integration into CMOS technology have been a very active research area. This paper reviews the progress and efforts made in the recent years for high-k dielectrics, which can be potentially integrated into 22 nm (and beyond) technology nodes. Our work includes deposition techniques, physical characterization methods at the atomic scale, and device reliability as the focus. For most of the materials discussed here, structural and physical properties, dielectric relaxation issues, and projections towards future applications are also discussed.

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Optical characteristics of H2O-based and O3-based HfO2 films deposited by ALD using spectroscopy ellipsometry

et al. 2015

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Optical and electrical characterization of hafnium oxide deposited by liquid injection atomic layer deposition

Cited by 10 publications

References 21 publications

A room temperature process for the fabrication of amorphous indium gallium zinc oxide thin-film transistors with co-sputtered Zr_xSi₁₋_xO₂Gate dielectric and improved electrical and hysteresis performance

A room temperature process for the fabrication of amorphous indium gallium zinc oxide thin-film transistors with co-sputtered Zr_xSi₁₋_xO₂Gate dielectric and improved electrical and hysteresis performance

Advanced CMOS Gate Stack: Present Research Progress

Optical characteristics of H2O-based and O3-based HfO2 films deposited by ALD using spectroscopy ellipsometry

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Optical and electrical characterization of hafnium oxide deposited by liquid injection atomic layer deposition

Cited by 10 publications

References 21 publications

A room temperature process for the fabrication of amorphous indium gallium zinc oxide thin-film transistors with co-sputtered ZrxSi1−xO2Gate dielectric and improved electrical and hysteresis performance

A room temperature process for the fabrication of amorphous indium gallium zinc oxide thin-film transistors with co-sputtered ZrxSi1−xO2Gate dielectric and improved electrical and hysteresis performance

Advanced CMOS Gate Stack: Present Research Progress

Optical characteristics of H2O-based and O3-based HfO2 films deposited by ALD using spectroscopy ellipsometry

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About

A room temperature process for the fabrication of amorphous indium gallium zinc oxide thin-film transistors with co-sputtered Zr_xSi₁₋_xO₂Gate dielectric and improved electrical and hysteresis performance

A room temperature process for the fabrication of amorphous indium gallium zinc oxide thin-film transistors with co-sputtered Zr_xSi₁₋_xO₂Gate dielectric and improved electrical and hysteresis performance