2018 International Conference on High Performance Computing &Amp; Simulation (HPCS) 2018
DOI: 10.1109/hpcs.2018.00105
|View full text |Cite
|
Sign up to set email alerts
|

OpenCL HLS Based Design of FPGA Accelerators for Cryptographic Primitives

Abstract: Modern data centers are being transformed to meet the increased processing needs of specialized workloads with an advantageous total cost of ownership. To this end, the modular design of current microservers allows the inclusion of heterogeneous computing platforms and accelerators to enhance the performance of specific workloads, while improving the power consumption and maintenance costs of the whole system. One of the fundamental application domains for datacenters is represented by bulk data encryption and… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1

Citation Types

0
3
0

Year Published

2019
2019
2020
2020

Publication Types

Select...
1
1

Relationship

1
1

Authors

Journals

citations
Cited by 2 publications
(3 citation statements)
references
References 8 publications
0
3
0
Order By: Relevance
“…For this purpose, fast disk encryption software support has been explored using GPGPUs [2]. Cryptography SEE proposed in M2DC [7] exploits the OpenCL programming model to realize high-performance FPGA accelerators. This way provides a viable and more versatile alternative to the use of ad-hoc cryptographic accelerators, currently available in high-end server CPUs only.…”
Section: Accelerating Cryptographymentioning
confidence: 99%
See 2 more Smart Citations
“…For this purpose, fast disk encryption software support has been explored using GPGPUs [2]. Cryptography SEE proposed in M2DC [7] exploits the OpenCL programming model to realize high-performance FPGA accelerators. This way provides a viable and more versatile alternative to the use of ad-hoc cryptographic accelerators, currently available in high-end server CPUs only.…”
Section: Accelerating Cryptographymentioning
confidence: 99%
“…In particular, we found out that single work-item, single work-group implementations are more suitable for FPGAs. We also identified other best-practices related to loop optimization, caching techniques, memory coalescing, I/O latency hiding and host-side synchronization, whose details can be found in [7].…”
Section: Accelerating Cryptographymentioning
confidence: 99%
See 1 more Smart Citation