2019
DOI: 10.1109/tns.2019.2921767
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Online Error Detection Through Trace Infrastructure in ARM Microprocessors

Abstract: This work presents a solution for error detection in ARM microprocessors based on the use of the trace infrastructure. This approach uses the Program and Instrumentation Trace Macrocells that are part of ARM's CoreSight™ architecture to detect control-flow and data-flow errors, respectively. The proposed approach has been tested with low-energy protons. Experimental results demonstrate high accuracy with up to 95% of observed errors detected in a commercial microprocessor with no hardware modification. In addi… Show more

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Cited by 17 publications
(19 citation statements)
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“…Because of that, an error which is not detected by the PDTC could not be diagnosed with this approach. However, the PDTC has been proven to detect most observable errors in previous work [17], so very few errors are expected to remain undiagnosed. In the future, we plan to improve the implementation of the PDTC to increase error detection capabilities.…”
Section: Discussionmentioning
confidence: 99%
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“…Because of that, an error which is not detected by the PDTC could not be diagnosed with this approach. However, the PDTC has been proven to detect most observable errors in previous work [17], so very few errors are expected to remain undiagnosed. In the future, we plan to improve the implementation of the PDTC to increase error detection capabilities.…”
Section: Discussionmentioning
confidence: 99%
“…A custom IP module, called Program & Data Trace Checker (PDTC), was implemented in the PL to decode and check the trace packets. The error detection capabilities of the PDTC have been shown in a previous work [17]. The PDTC uses the instruction trace provided by the PTM to detect control-flow errors.…”
Section: Fault Diagnosis Approachmentioning
confidence: 99%
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“…Trace Monitoring reuses the debug infrastructure that is commonly included in modern microprocessors for on-line error detection. The use of Trace Monitoring for error detection in an ARM microprocessor has recently been demonstrated in [6]. This approach uses two trace macrocells that are included by default in the commercial version of the microprocessor: the Program Trace Macrocell (PTM) and the Instrumentation Trace Macrocell (ITM).…”
Section: Introductionmentioning
confidence: 99%