On the Rectifiability of Arithmetic Circuits using Craig Interpolants in Finite Fields

Gupta, Utkarsh; Ilioaea, Irina; Rao, Vikas; Srinath, Arpitha; Kalla, Priyank; Enescu, Florian

doi:10.1109/vlsi-soc.2018.8644853

Cited by 7 publications

(4 citation statements)

References 13 publications

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“…We have described the notion of Craig interpolants in finite fields in our work [26]. This article is an extended version of that work where we formally define Craig interpolants in finite fields and prove their existence.…”

Section: Review Of Previous Workmentioning

confidence: 99%

“…The computation of interpolants uses Gröbner basis based algorithms which have high computational complexity. In contrast to [26], we further propose an efficient approach to compute interpolants based on the given circuit topology.…”

Section: Review Of Previous Workmentioning

confidence: 99%

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confidence: 99%

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Rectification of Arithmetic Circuits with Craig Interpolants in Finite Fields

Gupta

Ilioaea

Rao

et al. 2019

VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms

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When formal verification of arithmetic circuits identifies the presence of a bug in the design, the task of rectification needs to be performed to correct the function implemented by the circuit so that it matches the given specification. In our recent work [26], we addressed the problem of rectification of buggy finite field arithmetic circuits. The problems are formulated by means of a set of polynomials (ideals) and solutions are proposed using concepts from computational algebraic geometry. Single-fix rectification is addressed -i.e. the case where any set of bugs can be rectified at a single net (gate output). We determine if single-fix rectification is possible at a particular net, formulated as the Weak Nullstellensatz test and solved using Gröbner bases. Subsequently, we introduce the concept of Craig interpolants in polynomial algebra over finite fields and show that the rectification function can be computed using algebraic interpolants. This article serves as an extension to our previous work, provides a formal definition of Craig interpolants in finite fields using algebraic geometry and proves their existence. We also describe the computation of interpolants using elimination ideals with Gröbner bases and prove that our procedure computes the smallest interpolant. As the Gröbner basis algorithm exhibits high computational complexity, we further propose an efficient approach to compute interpolants. Experiments are conducted over a variety of finite field arithmetic circuits which demonstrate the superiority of our approach against SAT-based approaches.

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Section: Review Of Previous Workmentioning

confidence: 99%

Section: Review Of Previous Workmentioning

confidence: 99%

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mentioning

confidence: 99%

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Rectification of Arithmetic Circuits with Craig Interpolants in Finite Fields

Gupta

Ilioaea

Rao

et al. 2019

VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms

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“…In the example of Figure 1(b), the groups of nodes (6,7,8) and (9,11,12) are identified as XOR2, and nodes 6 and 9 as the matching MAJ2 (AND) functions. Subsequently, the functions at node 12 (S) and node 10 (C) are identified as XOR3 and MAJ3, respectively, sharing the same inputs, a, b, c 0 .…”

Section: Aig Rewritingmentioning

confidence: 99%

Rewriting Environment for Arithmetic Circuit Verification

Yasin

et al.

EPiC Series in Computing

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The paper describes a practical software tool for the verification of integer arithmetic circuits. It covers different types of integer multipliers, fused add-multiply circuits, and constant dividers - in general, circuits whose computation can be represented as a polynomial. The verification uses an algebraic model of the circuit and is accomplished by rewriting the polynomial of the binary encoding of the primary outputs (output signature), using the polynomial models of the logic gates, into a polynomial over the primary inputs (input signature). The resulting polynomial represents arithmetic function implemented by the circuit and hence can be used to extract functional specification from its gate-level implementation. The rewriting uses an efficient And-Inverter Graph (AIG) representation to enable extraction of the essential arithmetic components of the circuit. The tool is integrated with the popular ABC system. Its efficiency is illustrated with impressive results for integer multipliers, fused add-multiply circuits, and divide-by-constant circuits. The entire verification system is offered in an open source ABC environment together with an extensive set of benchmarks.

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