On the origin of the mobility reduction in bulk-Si, UTBOX-FDSOI and SiGe devices with ultrathin-EOT dielectrics

Ragnarsson, Lars‐Åke; Mitard, J.; Kauerauf, T.; Keersgieter, A. De; Schram, T.; Röhr, E.; Collaert, N.; Jurczak, M.; Hong, Sun-Gi; Tseng, J.; Wang, W.-E.; Trojman, Lionel; Bourdelle, K.K.; Nguyen, B.-Y.; Absil, P.; Hoffmann, T.

doi:10.1109/vtsa.2011.5872255

Cited by 16 publications

(10 citation statements)

References 3 publications

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“…Thanks to an excellent electrostatic control and transport properties, this architecture is suitable to reach ITRS requirements for 28 nm technology node and beyond [4].The threshold voltage can be easily adjusted by applying back biases (VB) and it has recently been demonstrated that the mobility can be enhanced in the forward regime (VB > 0 V for nMOS and VB < 0 V for pMOS) [5]. However, the presence of high-k dielectrics can induce mobility degradations when the Interfacial Layer (IL) Equivalent Oxide Thickness (EOT) is decreased [6][7][8].…”

Section: Introductionmentioning

confidence: 99%

Multi-scale strategy for high-k/metal-gate UTBB-FDSOI devices modeling with emphasis on back bias impact on mobility

et al. 2013

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scale strategy for high-k/metal-gate UTBB-FDSOI devices modeling with emphasis on back bias impact on mobility. Journal of Computational Electronics, Springer Verlag, 2013, 12, pp.675-684. 10.1007 Multi-scale analysis of the mobility in high-k UTBB-FDSOI Devices and comparison to split-CV measurements. Abstract-A rigorous study of the mobility in high-k metal gate Ultra-Thin Body and Box Fully Depleted SOI (UTBB-FDSOI) devices is done by means of split C-V measurements and advanced simulations. Measurements have been performed for various Interfacial Layer (IL)Equivalent Oxide Thickness (EOT) allowing an investigation of the physical mechanisms responsible for the mobility degradation at high-k/IL interface. The impact of the back bias on transport properties is investigated and mobility enhancement in the forward regime (back gate inversion) is demonstrated. A multi-scale simulation approach is performed and we compared simulated mobility using quantum Non-Equilibrium Green's Functions (NEGF) to semi-classical solvers results using the Kubo Greenwood (KG) approach. We demonstrated good correlations between these solvers comparing phonon and remote Coulomb-limited mobility. However, a clear overestimation of the surface roughnesslimited mobility determined using semi-classical solvers is shown compared to NEGF results. These advanced solvers have been used to reproduce mobility measurements allowing us to calibrate Technology computer aided design (TCAD) mobility models.

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Section: Introductionmentioning

confidence: 99%

Multi-scale strategy for high-k/metal-gate UTBB-FDSOI devices modeling with emphasis on back bias impact on mobility

et al. 2013

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“…As a matter of fact, scaling of the equivalent oxide thickness (EOT) in SiO x /HfO 2 dielectric stacks relies on reducing the physical thickness of the IL, which can be achieved in a controlled way by means of scavenging techniques [2], [3]. However, reducing the thickness of the IL has been shown to cause degraded mobility [4], [5], threshold voltage control [6] and reliability [7], severely limiting the scalability of SiO x interfacial layers below 0.4 nm.…”

Section: Introductionmentioning

confidence: 99%

Enhanced Channel Mobility at Sub-nm EOT by Integration of a TmSiO Interfacial Layer in HfO<sub>2</sub>/TiN High-k/Metal Gate MOSFETs

Litta

Hellström

Östling

2015

IEEE J. Electron Devices Soc.

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Integration of a high-k interfacial layer (IL) is considered the leading technological solution to extend the scalability of Hf-based high-k/metal gate CMOS technology. We have previously shown that thulium silicate (TmSiO) IL can provide excellent electrical characteristics and enhanced channel mobility at sub-nm EOT. This paper presents a detailed analysis of channel mobility in TmSiO/HfO 2 /TiN MOSFETs, obtained through measurements at varying temperature and under constant voltage stress. We show experimentally for the first time that integration of a high-k IL can benefit mobility by attenuating remote phonon scattering. Specifically, integration of TmSiO results in attenuated remote phonon scattering compared to reference SiO x /HfO 2 dielectric stacks having the same EOT, whereas it has no significant influence on remote Coulomb scattering.

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“…However, the equivalent oxide thickness (EOT) scaling generally induces dramatic mobility degradation [5]- [7]. MOSFETs with FDSOI architecture and sub-1 nm or ultrathin EOT (UTEOT) are interesting because they lead to a device with high C INV and high mobility, but they also present a real challenge [8]. In this paper, we first investigate the mobility improvement resulting from the back bias for FDSOI with ultrathin-body and buried (UTBB) oxide devices with 0.8-nm EOT and compare it with SiON devices, using the direct extraction of the FC and BC mobilities, for several back (V B ) and front (V G ) gate biases.…”

Section: Introductionmentioning

confidence: 99%

“…The gate dielectric used is either 1.8-nm HfO 2 or 2.5-nm SiON. In both cases, the gate electrode consists of 5-nm TiN capped with poly-Si cap [8], [9]. The BG doping is about 10 17 cm −3 .…”

Section: Introductionmentioning

confidence: 99%

Mobility Improvement Study for 8-Å-EOT HfO₂ UTBB-FD-SOI MOSFET Based on the Direct Extraction of the Back-Channel Mobility

Trojman

Ragnarsson

Collaert

2014

IEEE Trans. Electron Devices

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Mobility of fully depleted silicon-on-insulatorMOSFETs with ultrathin body (8 nm) and buried oxide (10 nm) and with equivalent oxide thickness (EOT) of about 0.8 nm processed with HfO 2 was investigated and compared with a device with an SiON-based dielectric. Under positive back-gate bias, we observed a maximum mobility improvement of approximately 150% for the HfO 2 device; however, this maximum mobility is 20% lower than the mobility of the SiON device. Using a temperature analysis and a careful study of the backand front-channel activations, we found that this improvement is explained by one channel located far from both interfaces. However, we also deduced that in this region, the mobility is strongly dependent of the transversal field. A larger field consistent with a lower EOT and larger charge defects explains the cause of the mobility degradation for the HfO 2 device. Furthermore, a lower coupling factor for this device enhances this degradation.Index Terms-Equivalent oxide thickness (EOT), fully depleted silicon-on-insulator (FDSOI), high-κ, mobility temperature dependency, ultrathin body, ultrathin box.

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On the origin of the mobility reduction in bulk-Si, UTBOX-FDSOI and SiGe devices with ultrathin-EOT dielectrics

Cited by 16 publications

References 3 publications

Multi-scale strategy for high-k/metal-gate UTBB-FDSOI devices modeling with emphasis on back bias impact on mobility

Multi-scale strategy for high-k/metal-gate UTBB-FDSOI devices modeling with emphasis on back bias impact on mobility

Enhanced Channel Mobility at Sub-nm EOT by Integration of a TmSiO Interfacial Layer in HfO<sub>2</sub>/TiN High-k/Metal Gate MOSFETs

Mobility Improvement Study for 8-Å-EOT HfO₂ UTBB-FD-SOI MOSFET Based on the Direct Extraction of the Back-Channel Mobility

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