On the Instrumentation of OpenMP and OmpSs Tasking Constructs

Servat, Harald; Teruel, Xavier; Llort, Germán; Durán, Alejandro; Giménez, Judit; Martorell, Xavier; Ayguadé, Eduard; Labarta, Jesús

doi:10.1007/978-3-642-36949-0_47

Cited by 9 publications

(4 citation statements)

References 12 publications

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“…The relatively low performance of the Xeon Phi warranted further investigation. Using OpenCL's built-in profiling capability via OpenCL events, and making use of Extrae and Paraver [30] to gather and visualize the events, we discovered that two specific kernels performed much slower than expected compared to the other platforms. These kernels were for performing the left and right halo updates, which require strided memory accesses.…”

Section: Cloverleafmentioning

confidence: 99%

On the Performance Portability of Structured Grid Codes on Many-Core Computer Architectures

McIntosh–Smith

Boulton

Curran

et al. 2014

Lecture Notes in Computer Science

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With the advent of many-core computer architectures such as GPGPUs from NVIDIA and AMD, and more recently Intel's Xeon Phi, ensuring performance portability of HPC codes is potentially becoming more complex. In this work we have focused on one important application area -structured grid codes -and investigated techniques for ensuring performance portability across a diverse range of different, high-end many-core architectures. We chose three codes to investigate: a 3D lattice Boltzmann code (D3Q19 BGK), the CloverLeaf hydrodynamics mini application from Sandia's Mantevo benchmark suite, and ROTORSIM, a production-quality structured grid, multiblock, compressible finite-volume CFD code. We have developed OpenCL versions of these codes in order to provide cross-platform functional portability, and compared the performance of the OpenCL versions of these structured grid codes to optimized versions on each platform, including hybrid OpenMP/MPI/AVX versions on CPUs and Xeon Phi, and CUDA versions on NVIDIA GPUs. Our results show that, contrary to conventional wisdom, using OpenCL it is possible to achieve a high degree of performance portability, at least for structured grid applications, using a set of straightforward techniques. The performance portable code in OpenCL is also highly competitive with the best performance using the native parallel programming models on each platform.

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Section: Cloverleafmentioning

confidence: 99%

On the Performance Portability of Structured Grid Codes on Many-Core Computer Architectures

McIntosh–Smith

Boulton

Curran

et al. 2014

Lecture Notes in Computer Science

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“…Available plugins include an Ayudame plugin for the Temanejo graphical debugger [16], a module to compute and output the DAG of tasks, another one (experimental) to provide a trace for execution for a task system simulator, and a module to provide a trace for Paraver [17] that can potentially embed Performance Application Programming Interface (PAPI) counters information. In [18], the authors describe how the parallel trace can visualized as Gantt charts using Paraver, from a variety of perspectives (e.g.,, from a task view or a thread perspective, showing the Instruction per cycle achieved by different threads, or the TLB miss ratio).…”

Section: Related Workmentioning

confidence: 99%

Performance Analysis of Tile Low-Rank Cholesky Factorization Using PaRSEC Instrumentation Tools

Cao¹,

Pei²,

Herauldt³

et al. 2019

2019 IEEE/ACM International Workshop on Programming and Performance Visualization Tools (ProTools)

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This paper highlights the necessary development of new instrumentation tools within the PaRSEC task-based runtime system to leverage the performance of low-rank matrix computations. In particular, the tile low-rank (TLR) Cholesky factorization represents one of the most critical matrix operations toward solving challenging large-scale scientific applications. The challenge resides in the heterogeneous arithmetic intensity of the various computational kernels, which stresses PaRSEC's dynamic engine when orchestrating the task executions at runtime. Such irregular workload imposes the deployment of new scheduling heuristics to privilege the critical path, while exposing task parallelism to maximize hardware occupancy. To measure the effectiveness of PaRSEC's engine and its various scheduling strategies for tackling such workloads, it becomes paramount to implement adequate performance analysis and profiling tools tailored to fine-grained and heterogeneous task execution. This permits us not only to provide insights from PaRSEC, but also to identify potential applications' performance bottlenecks. These instrumentation tools may actually foster synergism between applications and PaRSEC developers for productivity as well as high-performance computing purposes. We demonstrate the benefits of these amenable tools, while assessing the performance of TLR Cholesky factorization from data distribution, communication-reducing and synchronizationreducing perspectives. This tool-assisted performance analysis results in three major contributions: a new hybrid data distribution, a new hierarchical TLR Cholesky algorithm, and a new performance model for tuning the tile size. The new TLR Cholesky factorization achieves an 8× performance speedup over existing implementations on massively parallel supercomputers, toward solving large-scale 3D climate and weather prediction applications.

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“…The task creation event in their design is described using separate start and stop events. The same two events are used by Servat et al [22] for instrumenting the Nanos++ runtime system. The proposed chunk callback enables tools to understand and support forloops better.…”

Section: Related Workmentioning

confidence: 99%

Extending OMPT to Support Grain Graphs

Langdal

Jahre

Muddukrishna

2017

Scaling OpenMP for Exascale Performance and Portability

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Abstract. The upcoming profiling API standard OMPT can describe almost all profiling events required to construct grain graphs, a recent visualization that simplifies OpenMP performance analysis. We propose OMPT extensions that provide the missing descriptions of task creation and parallel for-loop chunk scheduling events, making OMPT a sufficient, standard source for grain graphs. Our extensions adhere to OMPT design objectives and incur a low overhead for BOTS (up to 2% overhead) and SPEC OMP2012 (1%) programs. Although motivated by grain graphs, the events described by the extensions are general and can enable cost-effective, precise measurements in other profiling tools as well.

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On the Instrumentation of OpenMP and OmpSs Tasking Constructs

Cited by 9 publications

References 12 publications

On the Performance Portability of Structured Grid Codes on Many-Core Computer Architectures

On the Performance Portability of Structured Grid Codes on Many-Core Computer Architectures

Performance Analysis of Tile Low-Rank Cholesky Factorization Using PaRSEC Instrumentation Tools

Extending OMPT to Support Grain Graphs

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