On the development of high-throughput and area-efficient multi-mode cryptographic hash designs in FPGAs

Michail, Harris E.; Athanasiou, George S.; Theodoridis, George; Goutis, C.E.

doi:10.1016/j.vlsi.2014.02.004

Cited by 16 publications

(8 citation statements)

References 14 publications

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“…Rote et al [36] optimized the structure of each round operation of SHA256 and SHA512 through the round pipelined technique to increase the algorithm frequency. Michail et al [37], [38] aimed at the SHA1 and SHA2 series hash algorithms using a variety of FPGA optimization techniques to achieve high-throughput and area-efficient multimode architectures, which can support single-or multimode algorithms of SHA1, SHA256 and SHA512. Tyler et al [39] introduced an expandable architecture targeted for an FPGA-based platform for recovering WPA/WPA2 passphrases.…”

Section: B Password Recovery Algorithmmentioning

confidence: 99%

Reconfigurable and High-Efficiency Password Recovery Algorithms Based on HRCA

Feng

Chen

et al. 2021

IEEE Access

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Cryptographic algorithms are widely used in information security fields such as network protocol authentication and commercial encryption software. Password recovery based on the hash algorithm is an important means of electronic forensics, encrypted information restoration, illegal information filtering, and network security maintenance. The traditional password recovery system is based mainly on the CPU and GPU and has a low energy efficiency ratio and cracking efficiency and cannot meet highperformance computing requirements. To further improve the computational efficiency and application flexibility of password recovery algorithms, this paper proposes a reconfigurable computing kernel design method based on a hybrid reconfigurable computing array (HRCA). Through in-depth analysis of the hash algorithm, the basic computing kernel set is extracted, and the combination design is carried out from the unit kernel, interconnection and storage structure to reconstruct the hash algorithm to match the application with the appropriate structure. Second, combined with the pipeline technology, the full pipeline hash and high-speed password attack algorithms are optimized and implemented to meet the needs of highperformance computing. Finally, an advanced computing kernel library is established, and the combination of a computing kernel map from the control and communication levels to achieve multidimensional reconfigurable computing and an overall placement strategy is used to make full use of the chip resources to improve computational efficiency. The experimental results and analysis show that compared with traditional CPU and GPU methods, the password recovery algorithm designed in this paper has the highest cracking speeds at 78.22 times and 2.65 times that of the CPU and GPU, respectively, and the highest energy efficiency ratio is 25.88 times and 3.16 times that of the CPU and GPU, respectively. Furthermore, the recovery efficiency has been significantly improved and meets the requirements of high-performance password recovery computing.

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Section: B Password Recovery Algorithmmentioning

confidence: 99%

Reconfigurable and High-Efficiency Password Recovery Algorithms Based on HRCA

Feng

Chen

et al. 2021

IEEE Access

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“…The latter version is evaluated against different FPGA platforms in [91], where the corresponding architecture of the Expander is also described. Finally, [105] presents a multi-mode hash accelerator based on the same techniques.…”

Section: Architectures With Spatial Reorderingmentioning

confidence: 99%

SHA-2 Acceleration Meeting the Needs of Emerging Applications: A Comparative Survey

Martino

Cilardo

2020

IEEE Access

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While SHA-2 is a ubiquitous cryptographic hashing primitive, its role in emerging application domains, e.g. blockchains or trusted IoT components, has made the acceleration of SHA-2 very challenging due to new stringent classes of requirements, especially implementation cost and energy efficiency. The survey discusses these emerging applications and their fundamental requirements. Then, the work presents a comprehensive review of the different design techniques available in the literature for SHA-2 acceleration. The main focus of the presentation is placed on the impact of each design technique on the area, energy, power, and performance of the resulting accelerator, guiding the designer through the identification of the appropriate technique mixes which meet the constraints of any given application.

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“…• [20] In this paper, Area efficient and high throughput multi-mode architecture for SHA-1 and SHA-2 was designed.…”

Section: Authormentioning

confidence: 99%

Reconfigurable FPGA Architecture for Cryptographic Hashing Algorithms

2019

IJITEE

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Nowadays, security is the most significant thing in the communication field. Most of the data transmitted over the communication channel are highly confidential so it needs more security. But this confidential data are easily stolen by hackers and it affects the users’ privacy. Nowadays, so many encryption algorithms have been established to protect the original information of the users. But, Hash Function (HF) security is the most important primitive which used for data authentication and data integrity. The reconfigurable cryptography integrated with chip which used for cryptography. Hashing algorithm is used to generate the random number which also used as a key value for cryptography. In this paper, different kind of Secured Hash Algorithms (SHA) such as SHA-0, SHA-1, SHA-2, and SHA-3 in that the SHA-2 has different family (SHA-2F) such as SHA-224, SHA-256, SHA-384, and SHA-512 is studied.

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On the development of high-throughput and area-efficient multi-mode cryptographic hash designs in FPGAs

Cited by 16 publications

References 14 publications

Reconfigurable and High-Efficiency Password Recovery Algorithms Based on HRCA

Reconfigurable and High-Efficiency Password Recovery Algorithms Based on HRCA

SHA-2 Acceleration Meeting the Needs of Emerging Applications: A Comparative Survey

Reconfigurable FPGA Architecture for Cryptographic Hashing Algorithms

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