On the Design and Development of a ReRAM-based Computational Memory Prototype

Fernandez, Carlos; Vourkas, Ioannis

doi:10.1109/vlsi-soc54400.2022.9939612

Cited by 1 publication

(2 citation statements)

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“…A lot of recent works have been published on the topic of implementing logic functions based on non-stateful [12][13][14] and stateful (see ref. [23] for a comparison) logic CIM.…”

Section: Related Work and Stateful Cim Conceptsmentioning

confidence: 99%

“…Part of this category are sense‐based non‐stateful operations which are typically based on a device readout sensing and a following current comparison. [ 12–14 ] During the sensing operation, a small read voltage is applied and the device output current is measured. For this, one reference current,

I_{\text{ref}}

, is defined for each logic operation.…”

Section: Introductionmentioning

confidence: 99%

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Improved Arithmetic Performance by Combining Stateful and Non‐Stateful Logic in Resistive Random Access Memory 1T–1R Crossbars

Brackmann,

Ziegler,

Jafari

et al. 2023

Advanced Intelligent Systems

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Computing‐in‐memory (CIM) is a promising approach for overcoming the memory‐wall problem in conventional von‐Neumann architectures. This is done by performing certain computation tasks directly in the storage subsystem without transferring data between storage and processing units. Stateful and non‐stateful CIM concepts are recently attracting lots of interest, which are demonstrated as logical complete, energy efficient, and compatible with dense crossbar structures. However, sneak‐path currents in passive resistive random access memory (RRAM) crossbars degrade the operation reliability and require the usage of active 1 Transistor–1 Resistance (1T‐1R) bitcell designs. In this article, the arithmetic performance and reliability are investigated based on experimental measurements and variability‐aware circuit simulations. Herein, it is aimed for the evaluation of logic operations specifically with fully integrated 1T–1R crossbar devices. Based on these operations, an N‐bit full adder with optimized energy consumption and latency is demonstrated by combining stateful and non‐stateful CIM logic styles with regard to the specific conditions in active 1T–1R RRAM crossbars.

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“…A lot of recent works have been published on the topic of implementing logic functions based on non-stateful [12][13][14] and stateful (see ref. [23] for a comparison) logic CIM.…”

Section: Related Work and Stateful Cim Conceptsmentioning

confidence: 99%