On the DC Offset Current Generated during Biphasic Stimulation: Experimental Study

Abstract

This paper deals with the DC offset currents generated by a platinum electrode matrix during biphasic stimulation. A fully automated test bench evaluates the nanoampere range DC offset currents in a realistic and comprehensive scenario by using platinum electrodes in a saline solution as a load for the stimulator. Measurements are performed on different stimulation patterns for single or dual hexagonal stimulation sites operating simultaneously and alternately. The effectiveness of the return electrode presence in reducing the DC offset current is considered. Experimental results show how for a defined nominal injected charge, the generated DC offset currents differ depending on the stimulation patterns, frequency, current amplitude, and pulse width of a biphasic signal.

An Offset Charge Compensating Biphasic Neuro - stimulation for Faradaic DC-Current Reduction

“…It needs to handle high voltage (HV) for injecting sufficient charge. Since using HV processes consumed much power and area [5], there were attempts to design an HV driver which distributes the HV to the multiple MOS stack. There were attempts to use sequential switching [7], but it lacks programmability.…”

“…It induces one-directional FC regardless of charge mismatch and thus resulting in oxidation of materials including harmful free radicals and reactive oxygen species. To solve this issue, macro-electrode dedicated for DC current path was proposed [5], but there still remain several problems. First, a large volume of macro-electrode is critical for implantable medical devices.…”

Deep Neural Network-Based Removal of a Decaying DC Offset in Less Than One Cycle for Digital Relaying

“…Since the 1970s, many methods have been developed to deal with a DC offset [3][4][5][6][7][8][9][10][11][12][13]. By assuming that a DC offset has a specific time constant that depends on power system configuration and fault location, least squares error, the Kalman filter, and recursive discrete time filter have been proposed to tackle the dc offset [3][4][5][6].…”

“…An applicable dc offset removal with a width range of time constant was discovered by using the recursive least squares error [9], but it is within a limited range. There are also other methods used to deal with a particular dc offset, such as the gearbox fault, PR current control of a single-phase grid-tied inverter, and DC offset-current generated during biphasic [11][12][13].…”

Design of an Ultra-Low Voltage Bias Current Generator Highly Immune to Electromagnetic Interference

“…ICs for implanted devices can include on-chip bias current generators operating in subthreshold to improve current matching as well as allow easy bias current tuning [21,22]. For this reason, among the basic on-chip requirements, the current generation for ICs operating in sub-threshold in the presence of Radio Frequency Interference (RFI) is addressed in this paper.…”