On the Conduction Properties of Vertical GaN n-Channel Trench MISFETs

Bahat‐Treidel, Eldad; Hilt, Oliver; Hoffmann, Veit; Brunner, F.; Bickel, Nicole; Thies, A.; Tetzner, Kornelius; Gargouri, Hassan; Huber, Christian; Donimirski, Konstanty; Würfl, Joachim

doi:10.1109/jeds.2021.3056697

Cited by 15 publications

(11 citation statements)

References 37 publications

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“…16) The gate trench sidewalls were aligned to the a-plane for better ONstate performance. 17) The fabrication was completed with Ni/Au and Ti/Al/Ni/Au as the source electrodes, while Ti/Au and Ti/Al/ Ni/Au as the gate and drain electrodes. Jagged groove sidewalls with several outward steps have been obtained in Device A.…”

mentioning

confidence: 99%

Effects of the stepped sidewall morphology on the ON-state performance for vertical GaN trench-gate MOSFETs

Tang¹,

Zhou²,

Yu³

et al. 2022

Appl. Phys. Express

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Vertical GaN trench-gate MOSFETs with ~130 nm stepped sidewalls in the p-GaN channel layer are studied and two significant influence have been observed. First effect is the degraded channel mobility which can be attributed to the increased probability of electron scattering under inversion conditions. Another influence is that only drain voltage (VDS) is applied over 30 V can the device turns on. It can be speculated that the stepped sidewall has a horizontal channel and no high enough transverse electric field to drive the electrons at low VDS.

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mentioning

confidence: 99%

Effects of the stepped sidewall morphology on the ON-state performance for vertical GaN trench-gate MOSFETs

Tang¹,

Zhou²,

Yu³

et al. 2022

Appl. Phys. Express

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“…However, under the inconsistent subsequent wet treatment conditions, different conclusions were drawn as to which plane performs better. − Gupta et al stated that the electrical characteristics of GaN vertical trench-gate MOSFETs with m -plane sidewall channels are better than that with a -plane sidewall channels . The maximum channel mobility obtained from a - and m -plane-oriented devices is 5 and 10 cm 2 V –1 s –1 , respectively, attributing to the smoother surface on m -plane sidewalls, which is consistent with the relevant morphology studies. − However, Treidel et al reported that GaN MISFET with a -plane sidewall channels shows four times higher the maximum current density and 80% declined on-resistance in comparison with those with m -plane sidewall channels, which can be well explained by a lower surface roughness on the a -plane sidewall . A study on vertical GaN nanowire (NW) FETs presents that the a -plane sidewall shows higher smoothness, owing to the horizontal steps that appear in the m -plane sidewall .…”

mentioning

confidence: 75%

“…14 current density and 80% declined on-resistance in comparison with those with m-plane sidewall channels, which can be well explained by a lower surface roughness on the a-plane sidewall. 18 A study on vertical GaN nanowire (NW) FETs presents that the a-plane sidewall shows higher smoothness, owing to the horizontal steps that appear in the m-plane sidewall. 19 So far, no comprehensive study has been conducted to reveal the exact mechanism underlying the different electrical properties resulting from different crystal surface morphologies.…”

mentioning

confidence: 99%

Comparative Analysis of the GaN Nonpolar Plane Morphology by Wet Treatment and Its Effect on Electrical Properties in Trench MOSFET

Zhou

Tang

et al. 2023

ACS Appl. Mater. Interfaces

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The morphological characteristics of the GaN nonpolar sidewalls with different crystal plane orientations were studied under various TMAH wet treatment conditions, and the effect of different morphological features on device carrier mobility was modeled and analyzed. After TMAH wet treatment, the morphology of the a-plane sidewall presents multiplied zigzag triangular prisms along the [0001] direction, which consist of two adjacent m-plane and c-plane on top. While along the [112̅0] direction, the m-plane sidewall is represented by thin, striped prisms with three m-plane and a c-plane on the side. The density and size of sidewall prisms were studied by varying the solution temperature and immersion period. The prism density decreases linearly as the solution temperature rises. With increased immersion time, both a-plane and m-plane sidewalls show smaller prism sizes. Vertical GaN trench MOSFET with nonpolar a- and m-plane sidewall channels were fabricated and characterized. By properly treated in TMAH solution, transistors with an a-plane sidewall conduction channel exhibit higher current density, from 241 to 423 A cm–2@V DS = 10 V, V GS = 20 V, and higher mobility, from 2.9 to 2.0 cm2 (V s)−1, compared to those of m-plane sidewall devices. The temperature dependence on mobility is also discussed, and a modeling analysis for the difference in carrier mobility is then performed.

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“…Recently, several vertical GaN transistors have been demonstrated, such as current aperture vertical electron transistors [105], trench MOSFETs [106] and power fin field-effect transistors (FinFETs) [9]. The temperaturedependent characteristics and dynamic switching performance of vertical GaN transistors have also been reported [9,[107][108][109][110]. The packaging of vertical GaN transistors is similar to their SiC counterparts.…”

Section: Gan Vertical Fets and Lateral Hemtsmentioning

confidence: 99%

Thermal management and packaging of wide and ultra-wide bandgap power devices: a review and perspective

Qin

Albano

Spencer

et al. 2023

J. Phys. D: Appl. Phys.

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Power semiconductor device is a fundamental driver for advancement in power electronics, the technology for electric energy conversion. Power devices based on wide-bandgap (WBG) and ultra-wide bandgap (UWBG) semiconductors allow for smaller chip size, lower loss and higher frequency as compared to the silicon (Si) counterpart, thus enabling a higher system efficiency and smaller form factor. Amongst the challenges for the development and deployment of WBG and UWBG devices is the efficient dissipation of heat, an unavoidable by-product of the higher power density. To mitigate the performance limitations and reliability issues caused by self-heating, thermal management is required at both device and package levels. Particularly, packaging is a crucial milestone for the development of any power device technology; WBG and UWBG devices have both reached this milestone recently. This paper provides a timely review on the thermal management of WBG and UWBG power devices with an emphasis on the packaged devices. Additionally, emerging UWBG devices hold good promise for high-temperature applications due to the low intrinsic carrier density and the increased dopant ionization at elevated temperatures. The fulfillment of this promise in system applications, in conjunction with overcoming the thermal limitations of some UWBG materials, require new thermal management and packaging technologies. To this end, we provide perspectives on the relevant challenges, potential solutions and research opportunities, highlighting the pressing needs for the device-package, electro-thermal co-design and the high-temperature packages that can withstand the high electric field expected in UWBG devices.

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On the Conduction Properties of Vertical GaN n-Channel Trench MISFETs

Cited by 15 publications

References 37 publications

Effects of the stepped sidewall morphology on the ON-state performance for vertical GaN trench-gate MOSFETs

Effects of the stepped sidewall morphology on the ON-state performance for vertical GaN trench-gate MOSFETs

Comparative Analysis of the GaN Nonpolar Plane Morphology by Wet Treatment and Its Effect on Electrical Properties in Trench MOSFET

Thermal management and packaging of wide and ultra-wide bandgap power devices: a review and perspective

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