On the Channel Percolation in Ferroelectric FET Towards Proper Analog States Engineering

Ni, Kai; Thomann, Simon; Prakash, Om; Zhao, Zijian; Deng, Shan; Amrouch, Hussam

doi:10.1109/iedm19574.2021.9720631

Cited by 32 publications

(15 citation statements)

References 7 publications

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“…In this work, we leverage two particular properties of emerging FeFET devices to secure NN systems, namely, (i) the inherent stochasticity in the spatial distribution of the ferroelectric domains to corrupt the NN weights [21], and (ii) the in-memory computation capability of FeFET to perform efficient and compact XNOR-based logic-in-memory [22]. We design a weight encryption scheme for protecting the confidentiality of hardware NNs by combining these two effects.…”

Section: B Key Contributions Of This Workmentioning

confidence: 99%

“…The underlying FDSOI device has been fully calibrated against measurements from 14 nm FDSOI technology node [24]. The ferroelectric material parameters, namely: remnant polarization, saturation polarization, and coercive field, are calibrated using measured Q FE -V FE data from a metal-ferroelectric-metal capacitor [21]. The resulting drain current(I DS ) against gate voltage sweep after programming the FeFET with a pulse of ± 4 V in Sentaurus TCAD from Synopsys is shown in Figure 4(a).…”

Section: B Fefet Device Construction and Workingmentioning

confidence: 99%

“…The high V TH state corresponds to 0 % P FE+ , where all the domains are polarized upwards and vice-versa for the low V TH state (100 % P FE+ ), where all the domains are polarized downwards. For a sufficiently long-channel FeFET, where domain size is much smaller than the channel dimensions, a gradual switching of the FeFET is observed and there can be many intermediate states of polarization [21].…”

Section: Implementation a Modeling The Inherent Randomness In Fefetmentioning

confidence: 99%

“…To model the variability and randomness (inherent stochasticity) inside FeFET, we employ our in-hause TCAD-based framework as in [21], [25]. It enables us to directly evaluate the impact of random spatial fluctuation of the polarization through emulating the polarization charges (P FE ) with fixed charges (Q FIX ) at the HfO 2 -SiO 2 interface.…”

Section: Implementation a Modeling The Inherent Randomness In Fefetmentioning

confidence: 99%

“…For a given % P FE+ , the total number of domains with Q FIX+ (or Q FIX-) is fixed and is randomly distributed in space to generate a random distribution of the channel electron density [21]. Next, Monte-Carlo simulations are performed to determine the effect of the random distribution of the domains on the electrical characteristics of FeFET.…”

Section: Implementation a Modeling The Inherent Randomness In Fefetmentioning

confidence: 99%

See 4 more Smart Citations

Leveraging Ferroelectric Stochasticity and In-Memory Computing for DNN IP Obfuscation

Mankali

Rangarajan

Chatterjee

et al. 2022

IEEE J. Explor. Solid-State Comput. Devices Circuits

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With the emergence of the Internet of Things (IoT), deep neural networks (DNNs) are widely used in different domains, such as computer vision, healthcare, social media, and defense. The hardware-level architecture of a DNN can be built using an in-memory computing-based design, which is loaded with the weights of a well-trained DNN model. However, such hardware-based DNN systems are vulnerable to model stealing attacks where an attacker reverse-engineers and extracts the weights of the DNN model. In this work, we propose an energy-efficient defense technique that combines a Ferroelectric Field Effect Transistor (FeFET)-based reconfigurable physically unclonable function (PUF) with an in-memory FeFET XNOR to thwart model stealing attacks. We leverage the inherent stochasticity in the FE domains to build a PUF that helps to corrupt the neural network's weights when an adversarial attack is detected. We showcase the efficacy of the proposed defense scheme by performing experiments on graph-neural networks (GNNs), a particular type of DNN. The proposed defense scheme is a first of its kind that evaluates the security of GNNs. We investigate the effect of corrupting the weights on different layers of the GNN on the accuracy degradation of the graph classification application for two specific error models of corrupting the FeFET-based PUFs and five different bioinformatics datasets. We demonstrate that our approach successfully degrades the inference accuracy of the graph classification by corrupting any layer of the GNN after a small re-write pulse.

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Section: B Key Contributions Of This Workmentioning

confidence: 99%

Section: B Fefet Device Construction and Workingmentioning

confidence: 99%

Section: Implementation a Modeling The Inherent Randomness In Fefetmentioning

confidence: 99%

Section: Implementation a Modeling The Inherent Randomness In Fefetmentioning

confidence: 99%

Section: Implementation a Modeling The Inherent Randomness In Fefetmentioning

confidence: 99%

See 3 more Smart Citations

Leveraging Ferroelectric Stochasticity and In-Memory Computing for DNN IP Obfuscation

Mankali

Rangarajan

Chatterjee

et al. 2022

IEEE J. Explor. Solid-State Comput. Devices Circuits

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Ferroelectric Transistors for Memory and Neuromorphic Device Applications

Kim

Lee

2023

Advanced Materials

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Because a non-centrosymmetric crystal structure is mandatory for ferroelectric properties, very few materials are classified as ferroelectric. Historically, materials with complex crystal structures, such as BaTiO 3 (BTO), Pb[Zr x Ti 1−x ]O 3 (PZT), and Sr 2 Bi 2 TaO 9 (SBT), have been found to exhibit ferroelectricity. [5][6][7][8][9] Due to their spontaneous polarization, ferroelectric materials are diversely applied in memory devices, actuators, sensors, and energy storage. [1,2,[10][11][12][13] As the polarization state of ferroelectric materials can be regulated by an external electric field and the polarization is retained after the removal of the external electric field, such materials have the potential for applications involving high-performance non volatile memories. [9,14] However, some issues of conventional ferroelectric materials, such as high annealing temperatures, the requirement of noble electrode materials, and the diffusion of elements such as Pb complicate the integration of the previously reported ferroelectric materials into complementary metal-oxide semiconductors (CMOSs). [15][16][17][18] Furthermore, the large dielectric constants of perovskite-based ferroelectrics lead to high depolarization fields; [9,16] thus, the materials have short retention time and exhibit unstable polarization. [9] Additionally, the limited thickness scalability, complex etching process, and fatigue behaviors of perovskite-based ferroelectrics hinder the development of highly scaled ferroelectric devices. [9,18] Thus, semiconductor devices based on ferroelectric materials have limited commercial applications. Since the development of hafnia-based ferroelectrics, ferroelectric hafnia has attracted immense attention toward the development of semiconductor devices. [19][20][21] Compared to perovskite-based ferroelectric materials, hafnia-based ferroelectrics exhibit high scalability, and have high coercive electric fields (E c ) and low dielectric permittivity values, making them suitable for the fabrication of high-performance memory devices. [2,16,20,22] Additionally, hafnia is compatible with Si-based CMOS processes. Due to these advantages, hafnia-based ferroelectrics have been used in next-generation memory devices (such as ferroelectric capacitors, transistors, and tunnel junctions [FTJs]). [22][23][24][25][26] This paper reviews the recent findings and applications of hafnia-based ferroelectrics, highlighting the recent advances in ferroelectric transistors for next-generation memory and neuromorphic Ferroelectric materials have been intensively investigated for highperformance nonvolatile memory devices in the past decades, owing to their nonvolatile polarization characteristics. Ferroelectric memory devices are expected to exhibit lower power consumption and higher speed than conventional memory devices. However, non-complementary metal-oxidesemiconductor (CMOS) compatibility and degradation due to fatigue of traditional perovskite-based ferroelectric materials have hindered the development of high-density...

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Powering Disturb-Free Reconfigurable Computing and Tunable Analog Electronics with Dual-Port Ferroelectric FET

Zhao,

Deng,

Chatterjee

et al. 2023

ACS Appl. Mater. Interfaces

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Single-port ferroelectric FET (FeFET) that performs write and read operations on the same electrical gate prevents its wide application in tunable analog electronics and suffers from read disturb, especially in the high-threshold voltage (V TH) state as the retention energy barrier is reduced by the applied read bias. To address both issues, we propose to adopt a read disturb-free dual-port FeFET where the write is performed on the gate featuring a ferroelectric layer and the read is done on a separate gate featuring a nonferroelectric dielectric. Combining the unique structure and the separate read gate, read disturb is eliminated as the applied field is aligned with polarization in the high-V TH state, thus improving its stability, while it is screened by the channel inversion charge and exerts no negative impact on the low-V TH state stability. Comprehensive theoretical and experimental validation has been performed on fully depleted silicon-on-insulator (FDSOI) FeFETs integrated on a 22 nm platform, which intrinsically has dual ports with its buried oxide layer acting as the nonferroelectric dielectric. Novel applications that can exploit the proposed dual-port FeFET are proposed and experimentally demonstrated for the first time, including FPGA that harnesses its read disturb-free feature and tunable analog electronics (e.g., frequency tunable ring oscillator in this work) leveraging the separated write and read paths.

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On the Channel Percolation in Ferroelectric FET Towards Proper Analog States Engineering

Cited by 32 publications

References 7 publications

Leveraging Ferroelectric Stochasticity and In-Memory Computing for DNN IP Obfuscation

Leveraging Ferroelectric Stochasticity and In-Memory Computing for DNN IP Obfuscation

Ferroelectric Transistors for Memory and Neuromorphic Device Applications

Powering Disturb-Free Reconfigurable Computing and Tunable Analog Electronics with Dual-Port Ferroelectric FET

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