On Numerical Robustness of Bi-quad Structures using Fixed-Point Approximate Multiplication

Abstract

Digital filters are key components in many applications related to wireless personal communication and multimedia devices, some even portable and battery powered. The ability to design and implement cost efficiently such filters is therefore of significant importance. Recursive filters are known to have low computational complexity (number of multiplication and addition) but at the same time they are numerically sensitive due to their feedback loop. Therefore, using arithmetic functional units with reduced accuracy might introduce some challenges, despite their proficiency in physical size, execution time, and power consumption. We are therefore interested in investigating to what extent approximate multiplication can be used in different types of bi-quad sections, which is the fundamental building block in higher order IIR filter systems. We found that it is possible to operate three selected types of such implementation structures in the presence of additive noise from multipliers with different degree of approximation, and we show that there are significant performance differences of the structures, both in the time-and in the frequency domain.

A First Experimental Study of Fixed-Point Approximate Arithmetic in Recursive Lattice Filters

“…However, this exploratory design reports only on 1 st order DF-I structures which is a severe limitation due to the generally accepted design approach where 2 nd order filter sections are used for implementing higher-order filters. This issue is addressed in [9] where the authors experiment with AxC multiplication in different types of bi-quad filter structures. For varying pole location and different filter topologies (DF-I, DF-II, and the Direct Canonical Form), they investigate how the degree of inaccuracy in AxC multiplication impact the overall numerical performance of such structures and show that, for a high degree of approximation and for critical pole locations, 979-8-3503-3757-0/23/$31.00 ©2023 IEEE the DF-II has, with some exceptions, the best performance, i.e., the least numerical deviation on the output as compared to an equivalent floating-point implementation.…”

“…In the ERPCAA, the a⊕b operation in the sum calculation, Equ. (9), is simplified to a Boolean a + b function, the exception being the most significant bit which is implemented as an exclusive OR of the two input operand bit to maintain the accuracy at the MSB-end of the inaccurate part.…”