On improving fault diagnosis for synchronous sequential circuits

Pomeranz, Irith; Reddy, S.M.

doi:10.1145/196244.196517

Cited by 10 publications

(4 citation statements)

References 16 publications

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“…However, these faults may not be equivalent in the Boolean algebraic sense. Further, these faults may be distinguished by the given test set under the multiple observation time strategy [Pomeranz and Reddy 1994].…”

Section: The Diagnostic Fault Simulatormentioning

confidence: 99%

“…The pessimistic measures and optimistic measures are the lower and upper bound of the actual diagnostic capability of a test set. To get more accurate measures the multiple observation time strategy could be utilized [Pomeranz and Reddy 1994]. The actual diagnostic measure will probabilistically be closer to the optimistic measure than the pessimistic measure in most cases, since distinguishing two potentially distinguished faults only requires different binary values on one of the primary outputs on any test vector.…”

Section: Pessimistic Versus Optimistic Measuresmentioning

confidence: 99%

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Diagnostic simulation of stuck-at faults in sequential circuits using compact lists

Hartanto

Venkataraman

Fuchs

et al. 2001

ACM Trans. Des. Autom. Electron. Syst.

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This article describes a diagnostic fault simulator for stuck-at faults in sequential circuits that is both time and space efficient. The simulator represents indistinguishable classes of faults as memory efficient lists. The use of lists reduces the number of output response comparisons between faults and hence speeds up the simulation process. The lists also make it easy to drop faults when they are fully distinguished from other faults. Experimental results on the ISCAS89 circuits show that the simulator runs significantly faster than an earlier work based on distinguishability matrices, and for large circuits is faster and more memory efficient than a recent method based on lists of indistinguishable faults. The paper provides the first reports on pessimistic and optimistic diagnostic measures for all faults of the large ISCAS circuits with known deterministic tests. The diagnostic fault simulator has also been modified to diagnose defects, given the output responses of failing devices. Results on simulated bridging defects show that the diagnosis time is comparable to the time for fault simulation with fault dropping.

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Section: The Diagnostic Fault Simulatormentioning

confidence: 99%

Section: Pessimistic Versus Optimistic Measuresmentioning

confidence: 99%

Diagnostic simulation of stuck-at faults in sequential circuits using compact lists

Hartanto

Venkataraman

Fuchs

et al. 2001

ACM Trans. Des. Autom. Electron. Syst.

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“…The definitions are summarized here for clarity. The test strategies considered are the multiple observation time strategy (MOTS) [1,2,16], and the conventional gate level test generation strategy (using threevalued simulation to evaluate logic values) [3]. The conventional gate-level test generation strategy can in fact be considered to be a restricted form of the single observation time strategy (RSOTS), because of a possible loss in accuracy due to simulation.…”

Section: Definitionsmentioning

confidence: 99%

Dynamic Fault Collapsing and Diagnostic Test Pattern Generation for Sequential Circuits

Boppana¹,

Fuchs²

1998

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In this paper, we present results for significantly improving the performance of sequential circuit diagnostic test pattern generation (DATPG). Our improvements are achieved by developing results that permit dynamic, fully functional, collapsing of candidate faults. Fault collapsing permits the organization of faults into disjoint partitions based on the indistinguishability relation. These results are used to develop a diagnostic test pattern generation algorithm that has the same order of complexity as that of detection-oriented test generation (ATPG). Techniques to identify untestable faults, based on exploiting indistinguishability identification, are also presented. Experimental results are presented on the ISCAS 89 benchmark circuits.

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“…Sequentially indistinguishable faults are characterized under the multiple observation time strategy [20,21], which was first applied to diagnosis in [22]. Any indistinguishable fault pair under the multiple observation time strategy is also indistinguishable under other test strategies.…”

Section: Preliminariesmentioning

confidence: 99%

Theorems for efficient identification of indistinguishable fault pairs in synchronous sequential circuits

Amyeen

Pomeranz

Fuchs

Proceedings 20th IEEE VLSI Test Symposium (VTS 2002)

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We introduce theorems that enable efficient identification of indistinguishable fault pairs in synchronous sequential circuits using an iterative logic array of limited length. These theorems can be used for identifying fault pairs that can be dropped from consideration before diagnostic ATPG starts, thus improving the efficiency of diagnostic ATPG. Experimental results are presented to demonstrate the effectiveness of the proposed theorems, which allow us to identify almost all the indistinguishable fault pairs in finite-state machine benchmarks.

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On improving fault diagnosis for synchronous sequential circuits

Cited by 10 publications

References 16 publications

Diagnostic simulation of stuck-at faults in sequential circuits using compact lists

Diagnostic simulation of stuck-at faults in sequential circuits using compact lists

Dynamic Fault Collapsing and Diagnostic Test Pattern Generation for Sequential Circuits

Theorems for efficient identification of indistinguishable fault pairs in synchronous sequential circuits

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