On-demand thread-level fault detection in a concurrent programming environment

Fu, Jian; Yang, Qiang; Poss, Raphael; Jesshope, Chris; Zhang, Chunyuan

doi:10.1109/samos.2013.6621132

Cited by 12 publications

(11 citation statements)

References 21 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Diversity enforced Diversity monitored (intrusive) (non-intrusive) [9], [9]- [11], [17], [19], [20] [3], [4] Our work [23], [24], [26]- [30] Note also that, with the help of Modelsim, we have visually inspected the contents of the pipelines of the cores in multiple cases with staggering and diversity, without staggering but with diversity, and with neither staggering or diversity, to validate that SafeDM behaved as specified.…”

Section: Diversity Unawarementioning

confidence: 99%

SafeDM: a Hardware Diversity Monitor for Redundant Execution on Non-Lockstepped Cores

Bas

Benedicte

Alcaide

et al. 2022

2022 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

View full text Add to dashboard Cite

Computing systems in the safety domain, such as those in avionics or space, require specific safety measures related to the criticality of the deployment. A problem these systems face is that of transient failures in hardware. A solution commonly used to tackle potential failures is to introduce redundancy in these systems, for example 2 cores that execute the same program at the same time. However, redundancy does not solve all potential failures, such as Common Cause Failures (CCF), where a single fault affects both cores identically (e.g. a voltage droop). If both redundant cores have identical state when the fault occurs, then there may be a CCF since the fault can affect both cores in the same way. To avoid CCF it is critical to know that there is diversity in the execution amongst the redundant cores.In this paper we introduce SafeDM, a hardware Diversity Monitor that quantifies the diversity of each redundant processor to guarantee that CCF will not go unnoticed, and without needing to deploy lockstepped cores. SafeDM computes data and instruction diversity separately, using different techniques appropriate for each case. We integrate SafeDM in a RISC-V FPGA space MPSoC from Cobham Gaisler where SafeDM is proven effective with a large benchmark suite, incurring low area and power overheads. Overall, SafeDM is an effective hardware solution to quantify diversity in cores performing redundant execution.

show abstract

Section: Diversity Unawarementioning

confidence: 99%

SafeDM: a Hardware Diversity Monitor for Redundant Execution on Non-Lockstepped Cores

Bas

Benedicte

Alcaide

et al. 2022

2022 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

View full text Add to dashboard Cite

show abstract

“…V. RELATED WORK Some solutions to implement redundancy relate to Redundant Multi-Threading in a multi-threaded core [27], [30], as well as across different cores [10], [21], [24], and even building on partial redundancy [9], [23]. Unfortunately, none of those solutions guarantees diversity, either by reusing the same hardware inside the core, or by failing to impose any staggering at all.…”

Section: Hardware Costsmentioning

confidence: 99%

SafeDE: a flexible Diversity Enforcement hardware module for light-lockstepping

Bas

Alcaide

Lorenzo

et al. 2021

2021 IEEE 27th International Symposium on on-Line Testing and Robust System Design (IOLTS)

View full text Add to dashboard Cite

Safety-related systems, such as those in automotive, avionics and space, impose the existence of appropriate safety measures to meet the safety requirements of the system. In the case of the highest integrity level functionalities (e.g. ASIL-D in automotive), diverse redundancy must be deployed to avoid unreasonable risk of a single fault leading the system to a failure (e.g. using lockstepped cores). However, existing lockstep solutions are either (1) highly intrusive and inflexible coupling two cores with hardware means, or (2) costly in terms of execution time and monitoring if a software monitor thread checks that cores running redundantly preserve sufficient staggering.This paper presents SafeDE, a Diversity Enforcement hardware module providing light-lockstep support by means of a non-intrusive and flexible hardware module that preserves staggering across cores running redundant threads, thus bringing time diversity. SafeDE reconciles the lightness and flexibility of software-only solutions, even allowing using the cores without any lockstepping, as well as the tighter staggering of hardware-only solutions that allow using staggering values of few cycles, instead of hundreds of microseconds, as for software-only solutions. Our integration of SafeDE in a RISC-V FPGA-based space multicore from Cobham Gaisler shows that staggering is effectively preserved, and SafeDE overheads are negligible in terms of area and performance due to staggering. 1 Available as an open-source component in https://bsccaos.github.io [6].

show abstract

“…Redundant execution in a GPU can be achieved at different granularities, include replication at thread block level [9], [10], [11], [12], [13], [14], at thread level, and at instruction level [15]. The finer the granularity, the more synchronization required, such as inter-thread communications (e.g.…”

Section: Gpu Concepts and Redundancy Granularitymentioning

confidence: 99%

Achieving diverse redundancy for GPU Kernels

Alcaide¹,

Kosmidis²,

Hernández³

et al. 2021

IEEE Trans. Emerg. Topics Comput.

View full text Add to dashboard Cite

Autonomous driving requires high-performance computing devices including general-purpose CPUs as well as specific accelerators, with GPUs having a key role due to their flexibility. Safety-critical microcontrollers have achieved ASIL-D compliance by implementing diverse redundancy with lockstep execution on-chip. However, a GPU does not provide diverse redundancy natively, thus failing to reach ASIL-D, which could only be reached with fully redundant lockstepped GPUs (2 GPUs) or pairing a GPU with another accelerator. However, both options may be infeasible due to procurement costs, and additional power, space and reliability costs to accomodate two devices. In this work, we present a variety of solutions to enable diverse redundant execution using only one GPU by taking advantage of the already internal redundancy of GPUs. We provide two lowly-intrusive hardware solutions and a software-only solution, with the latter evaluated directly on a real platform. In the case of the software-only solution, kernel execution on the GPU may require tailoring some parameters. With that objective, we also propose an algorithm that performs such tailoring automatically to guarantee software-only diverse redundancy on GPUs. Overall, our solutions allow achieving ASIL-D with a single GPU either with softwareonly solutions on a Commercial off-the-shelf GPU, or in a more efficient manner by introducing minor changes in the GPU design.2

show abstract

On-demand thread-level fault detection in a concurrent programming environment

Cited by 12 publications

References 21 publications

SafeDM: a Hardware Diversity Monitor for Redundant Execution on Non-Lockstepped Cores

SafeDM: a Hardware Diversity Monitor for Redundant Execution on Non-Lockstepped Cores

SafeDE: a flexible Diversity Enforcement hardware module for light-lockstepping

Achieving diverse redundancy for GPU Kernels

Contact Info

Product

Resources

About