On‐chip test method for in‐situ evaluating the impact resistance reliability of silicon microbeams

Abstract

To the best of the authors' knowledge, this Letter reports and validates for the first time an on-chip reseTable test method that can be used to in-situ evaluate the impact reliability of a process-related silicon microbeam. A test structure integrating impact generating device, test samples, and a lock module is proposed to evaluate the impact-resistant reliability of the process-related microbeam samples with only a common optical microscope and probe station in the fabrication line. A calculation model that uses the LS-Dyna module in the finite-element commercial software ANSYS to process the test results is proposed to obtain the numerical parameters of the impact resistance reliability of the microbeam specimen. The test structure can be manufactured using a variety of mainstream MEMS silicon processes, so it can characterise the impact reliability of silicon microbeam structures under various processes. The above three parts constitute a self-aligned, low-cost test method with automation potential, which can be used for large-scale characterisation of the impact resistance reliability of silicon microbeam structures on the fabrication line. Finally, beam specimens under three different process conditions were manufactured and successfully evaluated using this test method, which verified the rationality of this method.