On-Chip S-Shaped Rat-Race Balun for Millimeter-Wave Band Using Wafer-Level Chip-Size Package Process

Inui, C.; Manzawa, Yasuo; Fujishima, Minoru

doi:10.1109/emicc.2008.4772221

Cited by 9 publications

(4 citation statements)

References 9 publications

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“…A simple structure using the shown microstrip feeding in Figure 8 is designed for the proposed balun to extend the bandwidth. The length difference between two arms of transmission line is /2, where is the wavelength of microstrip [6][7][8][9].…”

Section: Input Impedance Of Folded Dipole Antennamentioning

confidence: 99%

Microstrip Folded Dipole Antenna for 35 GHz MMW Communication

Hua

Cui

Lü

et al. 2013

International Journal of Antennas and Propagation

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A microstrip asymmetric folded dipole antenna on chip is proposed in this paper. The construction of balun feed line is adopted to provide wideband. A new design procedure based on the odd-even mode method to calculate the input impedance of an asymmetric strip folded dipole antenna is presented. The folded dipole antenna has the advantage of small size, low profile, low cost, and so forth. The measured results show that a miniaturized antenna has the bandwidth of more than 14.2% (VSWR≤2); gain of the antenna is 5.7 dB at 35 GHz.

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Section: Input Impedance Of Folded Dipole Antennamentioning

confidence: 99%

Microstrip Folded Dipole Antenna for 35 GHz MMW Communication

Hua

Cui

Lü

et al. 2013

International Journal of Antennas and Propagation

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“…Figure 5 shows the structure of the SWTL. In the SWTL, the bottom ground shield has slits vertical to the signal line, which prevent return current from flowing through the bottom ground [15]. As a result, the inductance of the transmission line increases compared with that of a microstrip line without using slits, although capacitance remains approximately the same.…”

Section: S-shaped Rat-race Balun Using W-cspmentioning

confidence: 99%

50 GHz S-shaped rat-race balun with 1.4 dB insertion loss in a wafer-level chip-size package process

Öncü

Inui

Manzawa

et al. 2009

Int. J. Microw. Wireless Technol.

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In millimeter-wave CMOS circuits, a balun is useful for connecting off-chip single-end devices and on-chip differential circuits to improve noise immunity. However, an on-chip balun occupies a large chip area. To reduce the chip area required for the on-chip balun, a new rat-race balun using a rewiring technology with a wafer-level chip-size package (W-CSP) is proposed. The W-CSP balun occupies no area in a die because it is placed over integrated circuits. In the proposed balun, an S-shaped structure is adopted in order to directly connect the balun to differential GSGSG pads on a chip with a small area. The S-shaped W-CSP balun was fabricated on a silicon-on-insulator (SOI) substrate. The core area of the S-shaped rat-race balun is 480×735 µm, which is 22.4% that of a square rat-race balun. As a result of measurement, we found that the minimum insertion loss is 1.4 dB and the operating frequency ranges from 40 to 61 GHz.

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“…The insertion loss definition is not unique [4], [6] and expressions based on mixed signal signals can also be found in the public domain [1]. When α is expressed in dB, the insertion loss is usually reported as a positive number -the larger the number, the larger the loss.…”

Section: Introductionmentioning

confidence: 99%

“…Among the possible approaches [1], Marchand baluns [2] have been demonstrated to achieve very good performance at mm-wave frequencies in integrated form [3]- [5] despite the considerable Silicon substrate loss.…”

Section: Introductionmentioning

confidence: 99%

Analysis of tunable Marchand baluns

Boglione

Goodman

2014

2014 IEEE Radio Frequency Integrated Circuits Symposium

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-The paper tackles the issue of designing tunable Marchand baluns and provides an insight on available approaches for integrating the structure in a semiconductor process. Limitation of the approach and possible solutions are also discussed. The analysis is applied to a Marchand balun fabricated in IBM 8HP SiGe process to demonstrate the feasibility of the approach. A mix of measured and simulated data is used to support the analysis at Q band. State-of-theart performance is achieved.

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On-Chip S-Shaped Rat-Race Balun for Millimeter-Wave Band Using Wafer-Level Chip-Size Package Process

Cited by 9 publications

References 9 publications

Microstrip Folded Dipole Antenna for 35 GHz MMW Communication

Microstrip Folded Dipole Antenna for 35 GHz MMW Communication

50 GHz S-shaped rat-race balun with 1.4 dB insertion loss in a wafer-level chip-size package process

Analysis of tunable Marchand baluns

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