2021
DOI: 10.21203/rs.3.rs-155560/v1
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On-chip Reconfigurable Optical Neural Networks

Abstract: Implementing artificial neural networks on integrated platforms has generated significant interest in recent years. Several architectures for on-chip optical networks with basic functionalities have been successfully demonstrated, for example, optical spiking neurosynaptic, photonic convolution accelerator, and nanophotonic/electronic hybrid deep neuron networks. In this work, we propose a layered coherent silicon-on-insulator diffractive optical neural network, of which the inter-layer phase delay can be acti… Show more

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Cited by 6 publications
(2 citation statements)
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References 22 publications
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“…To overcome this bottleneck, recent works in diffractive optical neural networks (DONNs) [37][38][39][40] showcase the potential to offer millions of trainable optical neurons and connections passively through light diffraction in free space. The exploration of integrated DONNs on the silicon-on-insulator (SOI) platform follows suit [41][42][43][44][45][46], aiming to reduce footprint and enhance computation density and gaining prominence in optical computing schemes. In our previous work [47], we introduced a theoretical model of optical convolutional unit (OCU) based on on-chip DONN architecture to process single-kernel convolution in each individual unit with structural reparameterization (SRP) alogorithm.…”
Section: Introductionmentioning
confidence: 99%
“…To overcome this bottleneck, recent works in diffractive optical neural networks (DONNs) [37][38][39][40] showcase the potential to offer millions of trainable optical neurons and connections passively through light diffraction in free space. The exploration of integrated DONNs on the silicon-on-insulator (SOI) platform follows suit [41][42][43][44][45][46], aiming to reduce footprint and enhance computation density and gaining prominence in optical computing schemes. In our previous work [47], we introduced a theoretical model of optical convolutional unit (OCU) based on on-chip DONN architecture to process single-kernel convolution in each individual unit with structural reparameterization (SRP) alogorithm.…”
Section: Introductionmentioning
confidence: 99%
“…Therefore, it must be ensured that the modulated signals enter the input section of the DONNs at the same time. Routinely, the parallel input signals can be realized by integrated phase shifters (i.e., the integrated heaters) on each waveguide [14,30,31,37] . However, it is inevitably necessary to continuously provide additional energy to maintain the normal operation of these shifters by this way.…”
Section: Introductionmentioning
confidence: 99%