Jing-Zhe Xu et al. 301Nowadays, the multicore processor is watched with interest by people all over the world. As the design technology of system on chip has developed, observing and controlling the processor core's internal state has not been easy. Therefore, multicore processor debugging is very difficult and time-consuming. Thus, we need a reliable and efficient debugger to find the bugs. In this paper, we propose an on-chip debug architecture for multicore processors that is easily adaptable and flexible. It is based on the JTAG standard and supports monitoring mode debugging, which is different from run-stop mode debugging. Compared with the debug architecture that supports the run-stop mode debugging, the proposed architecture is easily applied to a debugger and has the advantage of having a desirable gate count and execution cycle. To verify the on-chip debug architecture, it is applied to the debugger of the prototype multicore processor and is tested by interconnecting it with a software debugger based on GDB and configured for the target processor.Keywords: JTAG, on-chip debugger, on-chip debug architecture, multicore processor debugging, monitoring mode debugging. Manuscript received July 18, 2012; revised Sept. 17, 2012; accepted Oct. 1, 2012
I. IntroductionToday, the multicore processor is more attractive than the single-core processor and widely used in embedded systems. However, there are many problems that need to be solved, such as with interconnection, cache coherency, scheduling, synchronization, the programming model, application, and so on [1]- [3]. In addition to these problems, the debugging of a multicore processor is also a challenging task.Some bugs of a system on chip (SoC) or its application programs appear only when executing the applications in real cases. So, having a debug unit to support debug functions is very necessary. Because of the dramatic increase in processor performance and the intrinsic lack of observability and controllability in multicore processors, an outside debug unit can no longer provide efficient debug capabilities, for example, in-circuit emulators or ROM monitors [4], [5]. In recent years, most processors employ an on-chip debug method that embeds a debug support logic into the target processor. The on-chip debug logic embedded in a processor works by interconnecting with a software debugger. It can allow the software developer to directly control the processor operation and examine the internal status, registers, and memories for debugging.On-chip debug functionalities can be classified into three types, based on the supported debug method. The first type supports a run-stop method that stops the processor core on a desired breakpoint to inspect the core ' Developing an on-chip-based processor debugger could be a difficult and complicated job that requires considerable time and effort. Therefore, easily adaptable and flexible on-chip debug architecture is needed for small companies and academic groups that develop their own customized processor cores for ge...