Octagonal Shaped Frequency Reconfigurable Antenna for Wi-Fi and Wi-MAX Applications

Madhav, B. T. P.; Babu, M. Ajay; Banu, P. Farhana; Teja, G. Harsha Sai; Prashanth, P

doi:10.1007/978-981-10-7329-8_59

Cited by 3 publications

(3 citation statements)

References 11 publications

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“…Almost for two and half decades, Xilinx has been , at the cutting edge of the programmable logic revolution, with the innovation and proceeded with relocation of FPGA stage innovation. The Xilinx Integrated Software Environment (ISE) is a ground breaking [12], and complex arrangement of devices. The reason for this guide is to enable new clients to get standard utilizing ISE to compile their structures.…”

Section: Resultsmentioning

confidence: 99%

An Approximate Multiplier for Efficient Multiplication using Xilinx

Prabakaran*,

Deepika,

Gunavardhani

et al. 2020

IJITEE

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In this paper, four double quality 4:2 blowers are proposed. Double quality blowers implies it has a capacity of exchanging between two modes to be specific correct and rough working modes. Double Quality blowers have capacity to give the higher speeds and will bring down the precision. To plan this model ordinary dada multiplier is taken as reference. Multiplier involves huge region yet it performs rapid tasks. To decrease the downsides in the framework we have actualized surmised double quality 4:2 blowers utilizing dada multiplier.

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Section: Resultsmentioning

confidence: 99%

An Approximate Multiplier for Efficient Multiplication using Xilinx

Prabakaran*,

Deepika,

Gunavardhani

et al. 2020

IJITEE

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“…After the choice is made, one of the switches of M3 and M4 could be became off to store strength intake. The simulation results show the power consumption has been reduced obviously [12] [14]. Besides, the power shows a little effect of V CM .…”

Section: Fig3 Elzakker's Comparatormentioning

confidence: 99%

Low Voltage High Performance Comparator

Kumar*,

Prabhakar,

Vardhan

et al. 2019

IJITEE

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A comparator has been proposed using the dynamic bias concept. The proposed comparator operates on low power with minimum delay. It describes the comparison of power and delay characteristics between the dynamic bias model, elzakker circuit and two stage dynamic comparator circuits. This is achieved by enhancing the total effective transconductance with in the circuit. All these circuits were simulated at 130nm technology with a supply voltage of 1.2V

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“…An efficient fault tolerant design can perform this two stage process with minimal impact on the performance of the adder in terms of speed, power, and area.This paper will analyse the implementation of sensitivity to errors in adders using a parallel-prefix scheme to measure the carrying signals quickly.The standard method of Triple Mode Redundancy (TMR) applied to the Han-Carlson Adder will be used as the reference design.In the concept is to add anHan-Carlson (HC) stage that calculates even bits for faulty adders from odd bits (or vice versa). [8][9][10][11] Faults are therefore accepted at the cost of overhead area / delay. Often proposed were triple integrated recovery methods for the identification and correction of errors at the overhead cost-large area.The paper analyses the effect on the Han-Carlson Adder of faults.…”

Section: Introductionmentioning

confidence: 99%

A Fault Tolerant Han-Carlsonadder using Tmr Technique

Rooban¹,

Divya²,

Preethi³

et al. 2019

IJRTE

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A fault tolerant Han-Carlson adder is implemented using TMR technique. This paper suggests a technique of Triple Mode Redundancy (TMR) in which the vote is processedto produce a single output by a majority voting system.Synthesis and simulation are performed using Vivado(Xilinx). The circuitry is basically repeated in triplicate, as the name suggests, with a voting circuit used to transmit to the output the majority rule signals.

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Octagonal Shaped Frequency Reconfigurable Antenna for Wi-Fi and Wi-MAX Applications

Cited by 3 publications

References 11 publications

An Approximate Multiplier for Efficient Multiplication using Xilinx

An Approximate Multiplier for Efficient Multiplication using Xilinx

Low Voltage High Performance Comparator

A Fault Tolerant Han-Carlsonadder using Tmr Technique

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