Observation of self-erase of wall charge in coplanar DBD

Abstract

In this paper, the experimental results of self-erase of wall charge in a coplanar dielectric barrier discharge excited by a square-wave with duty ratio are presented. The discharge characteristics including the peak and the time delay of the current depending on the sustain voltage are investigated. The results show that the wall charge can be erased at higher voltage supply. The discharge processes are asymmetric in two half-cycles of one period when the self-discharge occurs.

Effect of Wall Charge on Striation in Plasma Display Cells

“…No stable discharge can be sustained at a voltage below breakdown. This indicates that at DR=60% the wall charge is easy to be erased and only little wall charge will exist on the electrode surface acting as the "memory charge" [11] . The IR emission measured at 270 V/100 Hz is shown in Fig.…”

“…2) and agrees with the value measured at minimum voltage previously [6] . Because the applied voltage of 270 V is larger than the breakdown voltage, a self erasing discharge occurs when the pulse is off [11] . The similar striations are obtained at both 270 V and 190 V. It means that the applied voltage superposing the wall voltage is similar at both 270 V and 190 V. So the wall charge at 270 V will be much less than that at 190 V. This confirms that the pre-accumulated positive charge on the electrode surface in the previous pulse is not important for the formation of striation.…”