We report measurements of the temperature dependent conductivity in a silicon MOSFET that contains sodium impurities in the oxide layer. We explain the variation of conductivity in terms of Coulomb interactions that are partially screened by the proximity of the metal gate. The study of the conductivity exponential prefactor and the localisation length as a function of gate voltage have allowed us to determine the electronic density of states and has provided arguments for the presence of two distinct bands and a soft gap at low temperature.PACS numbers: 71.23. Cq, 71.55.Gs, 71.55.Jv, 72.15.Rn, 72.20.Ee, 72.80.Ng, 73.20.At, 73.40.Qv Since the invention of the silicon MOSFET, understanding the influence of impurities, especially sodium contamination, on device performance has been a priority and continues to provide a rich system for investigation by experimental and theoretical physicists alike. The electronic properties of sodium doped MOSFETs were first studied by Fowler and Hartstein 1,2 in the 1970s. They reported a single, broad peak in the subthreshold drain current against gate voltage and attributed it to the formation of an impurity band induced by the presence of sodium ions near the Si-SiO 2 interface. Further studies of narrow channel devices (∼ 100 nm) demonstrated a series of reproducible sharp peaks 3 , while later experiments found evidence for resonant tunneling between localised states in the channel. 4,5,6 For sufficiently low impurity concentrations, the overlap between neighbouring localized electron wavefunctions and consequently the hybridisation of their excited states is predicted to be reduced 7 , splitting the single impurity band observed at high concentrations into the ground and excited bands as modeled by Ghazali.8 Increasing the resistivity of the silicon substrate reduces the scattering from acceptors at the Si-SiO 2 interface, allowing the possibility for such a band splitting to be experimentally observed in the transport. In this paper, we will present evidence for the observation of two separate impurity bands with a soft gap, based on analysis of the temperature dependent conductivity below 20 K.The device we used is a MOSFET fabricated on a (100) oriented p-silicon wafer and was subsequently patterned in the circular Corbino geometry to eliminate Hall voltages and possible leakage paths. The effective gate channel length and interior width were respectively 1 µm and 346 µm. A high resistivity wafer (10 4 Ω.cm) provided a background concentration of less than 10 12 cm −3of boron corresponding to a mean distance between impurities of 1 µm. A 35 nm gate oxide was grown at 950• C in a dry, chlorine-free oxygen atmosphere. The phosphorous implanted and aluminium sputtered contacts were highly metallic and Ohmic at all temperatures investigated. Sodium ions were introduced onto the oxide surface by immersing the device in a 10 −7 N solution of high purity sodium chloride (99.999 %) in de-ionised water. The surface of the chip was dried with nitrogen gas and an aluminium gate s...