NVTraverse: in NVRAM data structures, the destination is more important than the journey

Friedman, Michal; Ben-David, Naama; Wei, Yuanhao; Blelloch, Guy E.; Petrank, Erez

doi:10.1145/3385412.3386031

Cited by 47 publications

(30 citation statements)

References 12 publications

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“…We observe that Px86's asynchronous explicit persist instructions lie in sharp contrast with a variety of previous work and developers' guides, ranging from theory to practice, that assumed, sometimes implicitly, łsynchronousž explicit persist instructions that allow the programmer to assert that certain write must have persisted at certain program points (e.g., [Arulraj et al 2018;Chen and Jin 2015;David et al 2018;Friedman et al 2020Friedman et al , 2018Gogte et al 2018;Izraelevitz et al 2016b;Kolli et al 2017Kolli et al , 2016Lersch et al 2019;Liu et al 2020;Oukid et al 2016;Scargall 2020;Venkataraman et al 2011;Yang et al 2015;Zuriel et al 2019]). For example, Izraelevitz et al [2016b]'s psync instruction blocks until all previous explicit persist institutions łhave actually reached persistent memoryž, but such instruction cannot be implemented in Px86.…”

Section: Introductioncontrasting

confidence: 69%

Taming x86-TSO persistency

Khyzha

Lahav

2021

Proc. ACM Program. Lang.

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We study the formal semantics of non-volatile memory in the x86-TSO architecture. We show that while the explicit persist operations in the recent model of Raad et al. from POPL'20 only enforce order between writes to the non-volatile memory, it is equivalent, in terms of reachable states, to a model whose explicit persist operations mandate that prior writes are actually written to the non-volatile memory. The latter provides a novel model that is much closer to common developers' understanding of persistency semantics. We further introduce a simpler and stronger sequentially consistent persistency model, develop a sound mapping from this model to x86, and establish a data-race-freedom guarantee providing programmers with a safe programming discipline. Our operational models are accompanied with equivalent declarative formulations, which facilitate our formal arguments, and may prove useful for program verification under x86 persistency.

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Section: Introductioncontrasting

confidence: 69%

Taming x86-TSO persistency

Khyzha

Lahav

2021

Proc. ACM Program. Lang.

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“…Like their predecessors, both capture the notion of data structure traversals and their logical isolation from an operation's "real" work. In the first, Freidman et al [22] define a Traversal Data Structure as a lock-free data structure satisfying specific properties that allow operations to be split into two phases. These phases are the Traversal phase and the Critical phase, of which only the latter requires instrumentation for making a data structure consistently persistent in non-volatile memory.…”

Section: Mvccmentioning

confidence: 99%

Technical Report: Bundling Linked Data Structures for Linearizable Range Queries

Nelson-Slivon¹,

Hassan²,

Palmieri³

2022

Preprint

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We present bundled references, a new building block to provide linearizable range query operations for highly concurrent lock-based linked data structures. Bundled references allow range queries to traverse a path through the data structure that is consistent with the target atomic snapshot. We demonstrate our technique with three data structures: a linked list, skip list, and a binary search tree. Our evaluation reveals that in mixed workloads, our design can improve upon the state-of-the-art techniques by 1.2x-1.8x for a skip list and 1.3x-3.7x for a binary search tree. We also integrate our bundled data structure into the DBx1000 in-memory database, yielding up to 40% gain over the same competitors.

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“…Care must be taken in deciding which values to flush and when to execute the flush and fence instructions, since these instructions are expensive. Researchers have therefore dedicated significant effort to carefully reasoning about inherent dependencies in algorithms, to omit flushes when it is safe to do so, yet still guarantee persistence on NVRAM [17,16,30,13,9,10,11,12,24,25,36].…”

Section: Introductionmentioning

confidence: 99%

“…Another advantage of the FliT library is its flexibility; while, by default, the FliT library instruments each load and store instruction to access the tag counters, this does not have to be the case. Many previous works have focused on understanding which values must be persisted, and which can be left volatile [17,16,14,9,11,12]. These efforts have led to many optimized persistent data structure implementations.…”

Section: Introductionmentioning

confidence: 99%

“…We evaluate the FliT library by using it to implement four different durable data structures; a linked-list [20], a BST [27], a skiplist [14], and a hash table [14]. Furthermore, for each data structure, we evaluate three different ways of making it durable; one that makes all instructions p-instructions, and two more optimized settings that appear in the literature; we consider the NVtraverse methodology [16], which allows us to have v-loads while traversing the data structure, and a manually optimized durable version of the same data structure [14]. We also evaluate different settings for the placement of the counters in the implementation of FliT, and compare these to the existing bit-tagging technique [14,19,35].…”

Section: Introductionmentioning

confidence: 99%

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FliT: A Library for Simple and Efficient Persistent Algorithms

Wei,

Ben-David,

Friedman

et al. 2021

Preprint

Self Cite

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Non-volatile random access memory (NVRAM) offers byte-addressable persistence at speeds comparable to DRAM. However, with caches remaining volatile, automatic cache evictions can reorder updates to memory, potentially leaving persistent memory in an inconsistent state upon a system crash. Flush and fence instructions can be used to force ordering among updates, but are expensive. This has motivated significant work studying how to write correct and efficient persistent programs for NVRAM.In this paper, we present FliT, a C++ library that facilitates writing efficient persistent code. Using the library's default mode makes any linearizable data structure durable with minimal changes to the code. FliT avoids many redundant flush instructions by using a novel algorithm to track dirty cache lines. The FliT library also allows for extra optimizations, but achieves good performance even in its default setting.To describe the FliT library's capabilities and guarantees, we define a persistent programming interface, called the P-V Interface, which FliT implements. The P-V Interface captures the expected behavior of code in which some instructions' effects are persisted and some are not. We show that the interface captures the desired semantics of many practical algorithms in the literature.We apply the FliT library to four different persistent data structures, and show that across several workloads, persistence implementations, and data structure sizes, the FliT library always improves operation throughput, by at least 2.1× over a naive implementation in all but one workload.1 While Intel announced the new eADR technology [21] that promises to persist cache contents as well, this would require powerful and expensive batteries to implement. Thus, it is unlikely that volatile caches will cease being a reality in the near future [31].

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NVTraverse: in NVRAM data structures, the destination is more important than the journey

Cited by 47 publications

References 12 publications

Taming x86-TSO persistency

Taming x86-TSO persistency

Technical Report: Bundling Linked Data Structures for Linearizable Range Queries

FliT: A Library for Simple and Efficient Persistent Algorithms

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