2011 International Electron Devices Meeting 2011
DOI: 10.1109/iedm.2011.6131620
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Novel SiC power MOSFET with integrated unipolar internal inverse MOS-channel diode

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Cited by 52 publications
(27 citation statements)
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“…This is preferable from an application point of view because higher V gsth provides large noise margin enabling stable switching operation. Besides, the package size of the former module is smaller than that of the latter module because the external anti-parallel diode chip paired with the MOSFET chip is not necessary [4]. This is essentially due to the fact that the channel diode in DioMOS functions almost similar to SiC SBD.…”
Section: Device Under Testmentioning
confidence: 91%
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“…This is preferable from an application point of view because higher V gsth provides large noise margin enabling stable switching operation. Besides, the package size of the former module is smaller than that of the latter module because the external anti-parallel diode chip paired with the MOSFET chip is not necessary [4]. This is essentially due to the fact that the channel diode in DioMOS functions almost similar to SiC SBD.…”
Section: Device Under Testmentioning
confidence: 91%
“…The concept of SiC DioMOS was proposed in 2011 [4]. Later this device was improved to meet more practical standards for high power switching devices, such as high threshold voltage (V gsth ), low on-state resistance (R dson ), and low forward voltage drop (V FO ) of the channel diode [15].…”
Section: Device Under Testmentioning
confidence: 99%
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“…Unlike in a standard SiC MOSFET module, where a MOSFET and an anti-parallel diode chips are fabricated separately, in the chosen MOSFET module, both the MOSFET and diode chips are fabricated on a single chip, so this MOSFET is also called DioMOS [11]. Table I shows the major differences between the selected SiC module and the standard SiC module (CAS120M12BM2) taken from the manufacturer datasheet [1,4].…”
Section: Device Under Testmentioning
confidence: 99%
“…Wide-bandgap semiconductors, e.g., SiC and III-nitride semiconductors, are commonly considered as an attractive material for use in high-temperature, high-speed and high-voltage devices because of its advantageous property [1,2]. The low-temperature buffer layer method allows improvements in the properties of optoelectronic devices especially for the growth of III-nitride semiconductor on a sapphire substrate [3].…”
Section: Introductionmentioning
confidence: 99%