and ZnO NWs [ 6,7 ] etc. have been intensively studied. The operation of these devices typically relies on modulating and retaining the trapped charges by controlling the applied bias voltage associated with a third electrode. The interfacial water molecules, [ 8 ] metal nanocrystals, [ 6 ] ferroelectric fi lm, [ 9,10 ] and high-k dielectric [ 5 ] have been used as the charge storage media in these FET memories. Such threeterminal devices, however, are suffering from their large size, limiting their use for further device integration. At the same time, the lack of control over the threshold voltage shift also results in poor reproducibility of the FET memories. In addition, they usually require high programming gate voltage and long write/erase time. All these drawbacks may seriously hinder their practical applications. Accordingly, two-terminal electrical switches such as resistive switching (RS) featuring simple device architecture have advanced rapidly in recent years. [ 11,12 ] The integration density of the memories and logic circuits could be remarkably improved by using the two-terminal switches, endowing RS based random access memory a promising alternative to the current fl ash memory for nonvolatile memories. Typically, the RS memories have a device structure similar to metalinsulator-metal (MIM), in which an insulator layer is sandwiched between two conductive electrodes. They can be electrically stimulated out of the high-resistance state after an initial electroforming cycle, and different switching behaviors, including bipolar, unipolar, and threshold switching, have been investigated in various binary transition metal oxides such as NiO, [13][14][15] [ 18 ] and perovskite oxides. [ 19,20 ] In spite of those unique advantages of RS memories, the underlying physical mechanism is not clear and still subjects to heated debate and controversy. In view of the widely-accepted fi lament model so far, [ 18,21 ] the formation and breakdown of the oxygen vacancy (V o ) chain conductive fi lament under electric fi eld is suggested to be responsible for the memory effect. [ 22 ] Nevertheless, the detailed generation and vanishing processes of the fi lament are complicated and hard to control, and a large voltage bias is generally required to initialize the memory for function. All these factors would compromise device stability and reproducibility.A novel two-terminal high-speed nonvolatile memory device is demonstrated featuring the construction of a quasi-metal-insulator-semiconductor (q-MIS) architecture. The quasi-MIS memory takes advantage of an in situ formed amorphous AlO x interfacial layer sandwiched between p-type ZnS nanoribbons (p-ZnSNRs) and a Al electrode. Systematical optimization of the AlO x interfacial layer enables the resultant memory to show excellent memory characteristics, including a fast programming speed of <100 ns, a high current ON/OFF ratio of ∼10 8 , a long retention time of 6 × 10 4 s, and good stability over 12 months. In addition, an interface-state-induced mechanism is proposed...