Novel low-power bus invert coding methods with crosstalk detector

Abstract

In System-on-a-Chip designs, crosstalk effects cause serious problems, such as wire propagation delay, noise, and power dissipation. In this article, we propose two new bus coding methods to reduce the dynamic power dissipation and wire propagation delay on buses efficiently. The proposed methods reduce both the dynamic power dissipation and wire propagation delay more than the existing bus coding methods do. Experimental results show that the crosstalk detector bus invert (CDBI) method reduces coupling activity to 25.7% from 36.4% and switching activity to 4.5% from 8.5% on 8-bit to 32-bit data buses. It reduces total power dissipation more than the other bus coding methods when a load capacitance is more than 0.3 pF/bit with UMC 0.09-mu m CMOS technology. The enhanced CDBI (ECDBI) coding method reduces coupling activity to 28.4% from 38.4% and switching activity to 10.1% from 14% on 8-bit to 32-bit data buses. It reduces total power dissipation more than the other bus coding methods when a load capacitance is more than 0.2 pF/bit with UMC 0.09-mu m CMOS technology. For a 0.8 pF/bit load capacitance, both the proposed methods reduce total power use by 19.3-30.9% when systems are implemented with UMC 0.09-mu m CMOS technology. Similarly, both the proposed methods also reduce total power consumption more than the other bus coding methods with TSMC 0.18-mu m CMOS technology. Meanwhile, the CDBI and the ECDBI schemes reduce total propagation delay up to 31.8% and 34.2%, respectively, on 32-bit data buses