Novel Low-Complexity Polynomial Multiplication Over Hybrid Fields for Efficient Implementation of Binary Ring-LWE Post-Quantum Cryptography

He, Pengzhou; Guin, Ujjwal; Xie, Jiafeng

doi:10.1109/jetcas.2021.3075456

Cited by 16 publications

(21 citation statements)

References 24 publications

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“…Another high-performance hardware BRLWE-based PQC was recently reported in [27]. A compact design was presented in [26]. Two new high-speed architectures were released in [27] and [28], respectively.…”

Section: A Existing Workmentioning

confidence: 99%

“…In this section, the proposed two architectures for the computation of W = A• B mod (x n +1)+C are compared with the existing InvBRLWE/BRLWE-based architectures, especially those very recent designs of [24], [27], [28], on both theoretical and implementational aspects. Note that some existing works like [26], [29] belong to compact designs (suitable for resource ultra-constrained applications), we do not include them here (for a fair comparison). The design of [25] does not have a correct structural setup on sign control and we thus do not include it in comparison to avoid unnecessary confusion.…”

Section: Comparison With Other Architecturesmentioning

confidence: 99%

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Efficient Hardware Arithmetic for Inverted Binary Ring-LWE Based Post-Quantum Cryptography

Imaña

Bao

et al. 2022

IEEE Trans. Circuits Syst. I

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Ring learning-with-errors (RLWE)-based encryption scheme is a lattice-based cryptographic algorithm that constitutes one of the most promising candidates for Post-Quantum Cryptography (PQC) standardization due to its efficient implementation and low computational complexity. Binary Ring-LWE (BRLWE) is a new optimized variant of RLWE, which achieves smaller computational complexity and higher efficient hardware implementations. In this paper, two efficient architectures based on Linear-Feedback Shift Register (LFSR) for the arithmetic used in Inverted Binary Ring-LWE (InvBRLWE)-based encryption scheme are presented, namely the operation of A • B + C over the polynomial ring Z q /(x n + 1). The first architecture optimizes the resource usage for major computation and has a novel input processing setup to speed up the overall processing latency with minimized input loading cycles. The second architecture deploys an innovative serial-in serial-out processing format to reduce the involved area usage further yet maintains a regular input loading time-complexity. Experimental results show that the architectures presented here improve the complexities obtained by competing schemes found in the literature, e.g., involving 71.23% less areadelay product than recent designs. Both architectures are highly efficient in terms of area-time complexities and can be extended for deploying in different lightweight application environments.

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Section: A Existing Workmentioning

confidence: 99%

Section: Comparison With Other Architecturesmentioning

confidence: 99%

Efficient Hardware Arithmetic for Inverted Binary Ring-LWE Based Post-Quantum Cryptography

Imaña

Bao

et al. 2022

IEEE Trans. Circuits Syst. I

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“…One of the latest variants of R‐LWE is the binary R‐LWE (BRLWE), which is highly applicable for resource‐constrained IoT environments. A novel implementation of BRLWE on the hardware platform is presented by He et al 104 This implementation drastically reduced the time complexity and resulted in reduced area‐time complexities. With the trend of implementing the cryptosystems in hardware platforms, Xie et al 105 presented an implementation of finite field arithmetic for BRLWE.…”

Section: P Ost‐quantum Cryptographymentioning

confidence: 99%

Post‐quantum cryptography techniques for secure communication in resource‐constrained Internet of Things devices: A comprehensive survey

Kumari

Singh

et al. 2022

Softw Pract Exp

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As the number and characteristics of smart devices change, the concept of the Internet of Things (IoT) emerges. The IoT provides the connected devices with a variety of resources that enable effective communication. At this point, several security issues arise to get the sensitive information behind every communication in the IoT. To provide users with security and privacy, cryptographic schemes are adopted, the most popular being public key cryptographic systems (PKC). However, with the advent of quantum computing, the level of security that can be provided by the PKC schemes is a big question. Another important issue is that the IoT environment is resource-constrained, which necessitates the implementation of lightweight cryptographic algorithms for better security. In response to these issues, the post-quantum cryptographic (PQC) schemes are one of the significant developments contributing to IoT security in the post-quantum world. This article examines the key security issues in the IoT environment and examines the effective solutions found in the literature. The problems in IoT in the quantum era are discussed and appropriate solutions by PKC schemes under limited resources in IoT are focused. As the lattice-based cryptosystems are more effective, the importance of these schemes

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“…The area-time complexities of the proposed designs (both the basic and higher-speed versions), in terms of the number of AND gates, XOR gates, adders, MUXes, and latency cycles, are listed in Table I along with those of the existing high-speed designs of [23], [24], [29]- [32], Note that the design of [27] is a special design based on LUT-like method and the structures of [26], [28] belong to compact designs, we thus do not list them here.…”

Section: A Complexity Analysismentioning

confidence: 99%

“…After the initial introduction [22], the authors reported the software implementation work on Atmel-AVR and ARM-Cortex-M0 microcontrollers. While on the hardware platform: (i) the first hardware implementation of the RBLWE-based scheme was released in [23]; (ii) the second hardware design for RBLWE-based PQC was reported in [24]; (iii) a high-speed hardware structure (but incomplete) was then reported in [25]; (iv) a compact RBLWE-based hardware architecture was presented in [26]; (v) a lookup-table (LUT)like method based hardware architecture was reported in [27]; (vi) another compact structure for RBLWE-based PQC was presented in [28]; (vii) a new high-speed hardware RBLWEbased structure was introduced in [29]; (viii) a pair of lowspeed and high-speed RBLWE-based hardware accelerators were presented in [30]; (ix) efficient hardware RBLWE-based architectures were also recently reported in [31], [32], respectively. Meanwhile, there also exist other types of implementations like the fault-resistant (software implementation) one of [33] and the fault detection scheme of [34] (based on the high-speed structure in [24]).…”

mentioning

confidence: 99%

KINA: Karatsuba Initiated Novel Accelerator for Ring-Binary-LWE (RBLWE)-based Post-Quantum Cryptography

He¹,

Tu²,

Xie³

et al. 2022

Preprint

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<p>Along with the National Institute of Standards and Technology (NIST) post-quantum cryptography (PQC) standardization process, lightweight PQC-related research and development have also gained substantial attention from the research community recently. Ring-Binary-Learning-with-Errors (RBLWE), a lightweight variant of Ring-LWE, which uses binary errors to replace the regular Gaussian distributed errors to achieve smaller complexity, has great potential to built such lightweight PQC scheme for emerging Internet-of-Things (IoT) and edge computing applications.The parameter settings of the RBLWE-based encryption scheme, however, are much smaller than the typical Ring-LWE one and then how to reduce its computational complexity becomes an interesting research topic.Following this direction, in this paper, we propose a Karatsuba Initiated Novel Accelerator (KINA) for efficient implementation of RBLWE-based PQC. Overall, we have made several coherent interdependent stages of efforts to carry out the proposed work: (i) we have presented the mathematical derivation process to propose a new Karatsuba Algorithm (KA)-based polynomial multiplication, the main algorithmic operation of the RBLWE-based scheme; (ii) we have then effectively mapped the proposed algorithm into a desired hardware accelerator with the help of a number of optimization techniques; (iv) we have also provided detailed complexity analysis and implementation comparison to demonstrate the superior performance of the proposed RBLWE-based PQC accelerator. Overall, the proposed RBLWE-based PQC accelerator involves two unique features: (i) this is the first report about Karatsuba initiated RBLWE-based PQC accelerator; (ii) the proposed RBLWE-based PQC accelerator offers flexible processing speed and can be fit in various high-performance applications. The proposed KINA is highly efficient and has the potential to be included in the implementation recommendation choices for RBLWE-based scheme deploying in lightweight applications.</p>

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Novel Low-Complexity Polynomial Multiplication Over Hybrid Fields for Efficient Implementation of Binary Ring-LWE Post-Quantum Cryptography

Cited by 16 publications

References 24 publications

Efficient Hardware Arithmetic for Inverted Binary Ring-LWE Based Post-Quantum Cryptography

Efficient Hardware Arithmetic for Inverted Binary Ring-LWE Based Post-Quantum Cryptography

Post‐quantum cryptography techniques for secure communication in resource‐constrained Internet of Things devices: A comprehensive survey

KINA: Karatsuba Initiated Novel Accelerator for Ring-Binary-LWE (RBLWE)-based Post-Quantum Cryptography

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