Novel High-Q Inductor using Active Inductor Structure and Feedback Parallel Resonance Circuit

The chapter reviews inductor theory and describes various integrated inductor options. It also explains why integrated planar spiral inductors are so useful when it comes to integrated RF circuits. Furthermore, the chapter discusses the theory of spiral inductor design, inductor modeling, and how this theory can be used in inductor synthesis. In the central part of the chapter, the authors present a methodology for synthesis of planar spiral inductors, where numerous geometries are searched through in order to fit various initial conditions.

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“…Other tunable inductors are commonly seen as implemented in active configuration, such as in the case of the inductor in Seo et al [13].…”

Section: Other On-chip Implementationsmentioning

confidence: 99%

RF IC Performance Optimization by Synthesizing Optimum Inductors

Božanić

Sinha

2015

Computational Intelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design

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“…1c. where: b 0 =g ds2 /C gs1 C gs2 ; b 1 =1/C gs2 (2) 2α=(g ds1 C gs1 +g ds2 C gs2 +g m2 C gs1 +g ds2 C gs1 )/C gs1 C gs2 (3) ω 0 2 =(g m1 g m2 +g m1 g ds2 +g ds1 g ds2 )/C gs1 C gs2 (4) According to these relations, the circuit input impedance is a function of transistors' transconductances (g m1 , g m2 ), parasitic capacitors (C gs1 , C gs2 ) and output resistances (r ds1,2 = 1/g ds1,2 ). Such a circuit can be used either as a resonator in order to build bandpass filters or as an active inductor for lower frequencies.…”

Section: Rlc Tosi Passive Modelmentioning

confidence: 99%

“…Their main advantage is the lack of on-chip capacitors, therefore being suitable for RF applications in the GHz domain, a maximum frequency of 5-7 GHz being reported so far for CMOS process [4][5][6]. The simplest gyrator can be implemented with a single transistor but due to stability problems, practical configurations use two or even three transistors.…”

Section: Introductionmentioning

confidence: 99%

Considerations on the RLC model of CMOS transistor only simulated inductors

Andriesei¹,

Patache²,

Goraș³

et al. 2011

ISSCS 2011 - International Symposium on Signals, Circuits and Systems

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International audienceA study of the classical RLC equivalent passive model for CMOS transistor only simulated inductors (TOSI) is presented. The model is compared with a four branches RLC model and its frequency performances and limitations are discussed. The analysis is applied on a particular active inductor topology for frequencies between 0.45 GHz and 3.3 GHz, the study being focused on the resonant frequency and inductance value. As simulations show, the model accuracy is strongly dependent on transistor parasitics and device modeling. It is shown that the second model is more accurate regarding the inductance value while the classical one is helpful for simplified calculus with respect to the resonant frequency. These considerations are valid in case of using charge based transistor model only. The simulations were carried out in 0.35μm AMS CMOS process

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“…Their fixed inductance values are inconvenient for reconfigurable circuit module design. As a result, there have been many efforts to implement active inductors [1][2][3][4][5][6][7].…”

Section: Introductionmentioning

confidence: 99%

“…Both are based on the well-known gyrator-C architecture, which uses two transconductance amplifiers to convert the susceptance of the capacitor C to inductive impedance [1][2][3][4]. A single ended inductor is shown in Fig.…”

Section: Introductionmentioning

confidence: 99%

A high frequency tunable differential active inductor and its application to power dividers

Wang

2008

2008 51st Midwest Symposium on Circuits and Systems

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A CMOS high-Q differential active inductor is proposed in this paper. Simulation results show that the inductance is tunable from ~ 1 nH to 100 nH with operating frequency tunable from 300 MHz to 10 GHz. The inductor occupies 40 × 70 μm 2 in IBM CMOS8RF 0.13 μm process. It is used to design a 9.5 GHz Wilkinson power divider. The post layout simulation using Spectre shows that, with all ports matched to 50 Ω, the return loss and the output ports isolation are better than 20 dB with an insertion loss of ~ 3 dB. The active area of the miniaturized Wilkinson power divider is 160×170 μm 2 , which is suitable for system integration.

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Novel High-Q Inductor using Active Inductor Structure and Feedback Parallel Resonance Circuit

Cited by 13 publications

References 5 publications

RF IC Performance Optimization by Synthesizing Optimum Inductors

RF IC Performance Optimization by Synthesizing Optimum Inductors

Considerations on the RLC model of CMOS transistor only simulated inductors

A high frequency tunable differential active inductor and its application to power dividers

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