Novel Flip Chip Technologies for Ultra Thin Chip

Takyu, Sodai; Kiritani, M.; Kurosawa, Takao; Shimizu, Noriko; Sato, Akinori; Maeda, Jun; Otsuka, Manabu; Takamatsu, Hideki

doi:10.1109/ectc.2007.373967

Cited by 6 publications

(8 citation statements)

References 2 publications

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“…14 DBG significantly improves the fracture strength of ultrathin dies compared to conventional dicing after backgrinding. 15,20,21,90,137,144 This is largely due to the significant reduction in backside chippage size. 90 However, DBG still induces residual stress layers on the ground wafer backside and on the blade dicing sidewall.…”

Section: Dicing Before Thinningmentioning

confidence: 97%

“…136 Furthermore, dicing the wafer together with a dicing tape induces backside chippage if the elastic modulus of the dicing tape adhesive is insufficient to sustain the dicing stresses. 15,20,90 The transition to Cu/low-k ILD in high performance circuitries to reduce RC delay and power loss, and to improve heat dissipation, has introduced new challenges for blade dicing. Low-k layers have very low fracture toughness and poor adhesion to adjacent films in upper and lower layers.…”

Section: Mechanical Blade Dicingmentioning

confidence: 99%

“…5,12,[14][15][16]18,20,21,27,42,86,89,90,137,143,144 In the DBG process, die singulation occurs during grinding instead of dicing. In the DBG process flow for ultrathin dies, 14,42,84,89,143 first a wafer is partially diced from its frontside to the desired final die thickness by blade dicing, laser scribing, wet etching, plasma etching, or a combination of these ( Figure 40).…”

Section: Dicing Before Thinningmentioning

confidence: 99%

“…85 Die strength is not only dependent on die thickness and size, but could be affected by backside and sidewall defects induced by the thinning and dicing processes. 5,14,18,[20][21][22]60,[86][87][88][89][90][91] There are two major factors affecting the die strength, namely backside surface fracture strength and sidewall fracture strength. The backside surface fracture strength is generally improved by post-grinding and stress-relief processes such as CMP, spin etching, and plasma etching.…”

Section: Dicing Of Ultrathin Wafersmentioning

confidence: 99%

“…9,[12][13][14][15][16][17][18][19][20][21][22][23][24][25][26][27]59 This has necessitated a post-grinding treatment process to remove the wafer backside damage and residual stresses, especially for wafers below 100 mm thickness. Several post-grinding treatment were developed for this purpose: chemical mechanical polishing (CMP), 9,[12][13][14][15][16]19,20,25,[27][28][29][30][31]111,128 wet chemical etching, 9,12,13,16,18,19,25,27,34,35,89,90,111,114 plasma etching, 9,[12]…”

Section: Introductionmentioning

confidence: 99%

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Ultrathin Wafer Pre-Assembly and Assembly Process Technologies: A Review

Marks

Hassan

Cheong

2015

Critical Reviews in Solid State and Materials Sciences

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Ultrathin silicon wafer technology is reviewed in terms of the semiconductor applications, critical challenges, and wafer pre-assembly and assembly process technologies and their underlying mechanisms. Mechanical backgrinding has been the standard process for wafer thinning in the semiconductor industry owing to its low cost and productivity. As the thickness requirement of wafers is reduced to below 100 mm, many challenges are being faced due to wafer/die bow, mechanical strength, wafer handling, total thickness variation (TTV), dicing, and packaging assembly. Various ultrathin wafer processing and assembly technologies have been developed to address these challenges. These include wafer carrier systems to handle ultrathin wafers; backgrinding subsurface damage and surface roughness reduction, and post-grinding treatment to increase wafer/die strength; improved wafer carrier flatness and backgrinding auto-TTV control to improve TTV; wafer dicing technologies to reduce die sidewall damage to increase die strength; and assembly methods for die pick-up, die transfer, die attachment, and wire bonding. Where applicable, current process issues and limitations, and future work needed are highlighted.

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Section: Dicing Before Thinningmentioning

confidence: 97%

Section: Mechanical Blade Dicingmentioning

confidence: 99%

Section: Dicing Before Thinningmentioning

confidence: 99%

Section: Dicing Of Ultrathin Wafersmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Ultrathin Wafer Pre-Assembly and Assembly Process Technologies: A Review

Marks

Hassan

Cheong

2015

Critical Reviews in Solid State and Materials Sciences

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The development of Cleaving — DBG + CMP process

Takyu

Kiritani

Kurosawa

et al. 2010

2010 IEEE CPMT Symposium Japan

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As telecommunication equipment that supports high-level information networks is being made portable, the requirements for telecommunication equipment to be small and lightweight are becoming stricter. Thus, miniaturization of semiconductor devices is necessary, and wafer dicing and chip thinning technologies are important key technologies to achieve it. Wafers are thinned by mechanical in-feed grinding using a grindstone containing diamond particles, and wafers are divided by mechanical blade dicing using a diamond blade. However, mechanical processes using diamond grits leave damage such as chipping, saw mark or residual strain on chip surfaces; thus, chip strength decreases. At chip thicknesses of 50 to 200 µm, such damage has to be avoided.In this study, novel manufacturing process steps for thin semiconductor devices are followed.

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